The ADC on the ATmega chips samples for either half (or one?) clock period of the analog clock, which
is typically running at 125kHz. So it samples for 4us, then holds the voltage on an internal capacitor
during conversion.
Since the capacitor holds charge from last time, you have to ensure that a voltage source driving
an analog pin has a low enough impedance to fully charge the capacitor to the new sample voltage
in that short time period (within 10 bit accuracy, ie 0.05%). This is why 10k or lower source impedance
is recommended.