How long must logic level stay active for MCU to detect level change?

I am implementing interrupts to detect logic level change. How long must the logic level stay active for MCU to detect level change? I am using Atmega328. The logic level in my case stays active for 200ms.

Datasheet says longer than 1 clock period. At 16 MHz, that’s 62.5nS. 200mS is plenty long enough.