Hi, i was wondering if someone has a good explanation on how to set the dividers to generate the clock for the i2S on an ESP8266.
it is a bit of an XY here. I want to use DMA to generate 250KHz signal.
I have an example from a clock division for 800KHz & 400KHz
const static uint32_t I2sClockDivisor = 3;
const static uint32_t I2sBaseClockDivisor = 16;
// set the rate
uint32_t i2s_clock_div = T_SPEED::I2sClockDivisor & I2SCDM;
uint8_t i2s_bck_div = T_SPEED::I2sBaseClockDivisor & I2SBDM;
I2SC |= I2SRF | I2SMR | I2SRSM | I2SRMS | (i2s_bck_div << I2SBD) | (i2s_clock_div << I2SCD);
Apologies for the snippet, there is something missing (the T_SPEED macro ? is it ?)
Anyway it comes from a library that uses DMA but if someone knows how to calculate the BaseClockDivisor & ClockDivisor and / or can give me a somewhat clear explanation on how it is done.
For a UART they usually provide some kind of table, here i had difficulty finding any other info then "It is made up out of 3 ? values' But nowhere an indication of how it is done.