Ok, great. So in reply #56, you have an approximate -10% of full scale offset. This could be explained many ways, for example your resistors may not be more accurate than that. But you can still make it zero by subtracting the offset. You can find out the exact offset by running a sketch to read the raw ADC value, then subtract that number from the input stream, instead of the theoretical 4096/2.
However, it is still possible that it is due to some error in your circuit. I suggest, calibrate the circuit by using a sketch to read the actual offset, then subtract that same amount from it in your application sketch.
What is the purpose of the capacitive voltage divider on the output of your preamplifier? Also the arrangement of 100k collector load resistor and 10k feedback network confuses me. I can't say that I've seen it before. Where did you find it? Can you explain how it works? To me, it looks like the 10k resistor should actually connect to the collector.