I like that thought; it would indeed be a solution, although (as I argued above) I personally think it would make more sense to evade the problem altogether.
However, to latch into your train of thought: another possibility is to have one ISR defined in the main sketch, and an update-routine in the class that can be called by the ISR. You could have any (reasonable) number of class instances register with the ISR, much like how you register timer interrupt handlers on e.g. an ESP platform.
In practice this approach works fairly well, but there are platform-specific requirements to take note of (much like in your own proposed solution). For instance, on ESP platforms it requires that the ISR-called routines are stored in IRAM to prevent long jumps in the ISR, which may (or may not...in practice it sometimes works OK) trigger the watchdog and cause a kernel panic. I don't know what the caveats on Pi Pico would be, but there are likely to be some. Hence my recommendation to avoid the problem altogether as in my experience it doesn't compare favorably to the lower complexity of an alternative solution.