HW SCL-lock for the ESP8266

This could be the most used thing you designed this year. :slight_smile:

The ESP has no hardware I2C/TWI (they say). To act as a slave, the ESP has to be on the toes to not miss changes on SCL. At 100kHz the ESP often miss to react on interrupts within the tiny 5 us SCL is low.

So, I want to have simple* 3.3V logic, that KEEPS SCL low as soon as it GETS low, and keeps it there until a control-pin on ESP changes state. You decide L_to_H or H_to_L.

If this clock-stretching can be achieved with some magic programming of the ESP, then of course it is a preferred solution!

*Two transistors, FET analog switch, NAND or other logic ic.

Would be great to have i2c clock-stretching in ESP8266.