Improving & Extending the SUMP Logic Analyzer

I came across the SUMP compatible logic analyzer for Arduino a week or so ago, and it's really cool. If you're not familiar, that's here: SUMP Compatible Logic Analyzer for Arduino

Now - this is certainly an interesting little tool - but it is really limited by its very small sample size... 1,024bytes on the ATMega328p. I wanted to expand this by utilizing the hardware SPI to talk to some SRAM. I'd love feedback on any of the following, just general feasibility and especially any pitfalls I might be overlooking...

I have a bunch of 23k640 MCP 8,192byte SPI SRAM sitting around. I've done some tests and I can get a decent 8,192byte record at 500kHz with the Arduino's built in 16MHz resonator to this SRAM. I believe with some optimization I could easily get to 1MHz sampling with a nearly arbitrary number of SRAM ICs, using the hardware SPI and calculating the next address in the ~18 clocks it takes to communicate with the SRAM. (Number lifted from Have I made this SPI hardware transfer as fast as possible?)

Now I'd like to take this to a proper PCB, with a 20MHz crystal for improved speed and accuracy and I've attached my first stab at a schematic that permits that.

This will also be my first PCB.. I have all the materials to etch my own, and I'm working out the traces now in Fritzing.

So as I said above - can anyone point out any shortcomings in my schematic (I'm sure there are many?) Although I've been a programmer for decades I'm still fairly new to electronics and would love any advice.

Take a look at the DUE. Higher speed more SRAM....

Mark

Thanks - but a Due is $50+ and at that point I may as well buy a Logic Shrimp if I wanted it purely for the logic analyzer qualities.

This is, as many microcontroller projects on this forum are, more for learning and experimentation, so that's why I was hoping for feedback on this particular design.

Well, if it takes 18 clocks to save a value in the SRAM you will need a clock speed of 18MHz to achieve 1MHz a sample rate.

The rest of it looks good from here. I'm not going to check but do you have all the input lines on the same 'port' on the ATMega?

Thanks for the check! I do think I have them all to the same port, with the exception of the "Chip Select" pin, which should be one per output pin on PORTC of the ATMega328. My plan is to iterate through the pins as the buffer fills up.

I did realize I left one SCK pin unattached, so I fixed that and fabbed a PCB. Attached a photo of that. This was my first PCB manufacture, but I'm pretty happy with how the toner method turned out. Now I have a bucket of Hydrochloric acid to deal with though.

I'll post another photo after I finish soldering. :smiley:

Also yes, you're correct - 18MHz would yield a 1MHz sample rate. I don't have any 18MHz crystals, so I will use a 20MHz and perhaps find something else to do for 2 extra clock cycles. Should still work out, I think?

With luck... this should result in a logic analyzer that can record 6 channels/32Kilosamples at 1MHz. Actually, I suppose I could use the extra 1KB on board the ATMega too. No harm really.