Interrupt Queuing?

I am unsure about a very specific case of how interrupts are handled. I have an external interrupt on a rising edge of pin 3. Say an interrupt occurs because pin 3 goes high, while the ISR is executing, pin 3 goes low and goes back high before the ISR is finished. I know interrupts are turned off while inside interrupt, but sometimes when this happens the ISR exits and enters back immediately. Do ISR's queue and execute immediately after the end of a previous ISR if an interrupt happens during an ISR execution?

Do ISR's queue and execute immediately after the end of a previous ISR if an interrupt happens during an ISR execution?

No.

Grumpy_Mike:
No.

IIRC the datasheet says that the processor will return to the main code and run one instruction and then come back and get the interrupt. Either way, the datasheet is where you would want to go for an answer like this.

It all depends on where in the ISR the interrupt flag is cleared. That depends on the compiler. Their is no queue as such like you find in other processors, that is, their is no FIFO buffer for the flag register. Certainly if their are two interrupts during an ISR then all it can do is to set the same flag, you will not get two extra calls.

Do ISR’s queue and execute immediately after the end of a previous ISR if an interrupt happens during an ISR execution?

Your language is somewhat imprecise. Interrupt flags are queued. The corresponding ISR’s are executed in order of priority of the pending flags. “Immediately” may be after something else of higher priority.

Nick Gammon puts it this way in https://gammon.com.au/interrupts

Can interrupts occur while interrupts are disabled?

Interrupts events (that is, noticing the event) can occur at any time, and most are remembered by setting an “interrupt event” flag inside the processor. If interrupts are disabled, then that interrupt will be handled when they are enabled again, in priority order.

I have an external interrupt on a rising edge of pin 3. Say an interrupt occurs because pin 3 goes high, while the ISR is executing, pin 3 goes low and goes back high before the ISR is finished. I know interrupts are turned off while inside interrupt, but sometimes when this happens the ISR exits and enters back immediately.

This can happen with the caveat on “immediately”.

Re #3. True that. Still, this is all explained quite explicitly in the data sheet in the section on interrupts. The OP should have a look there to fully understand.