@wvmarle: According to my interpretation of the specs writing a logical zero in the External Interrupt Flag Register does not trigger anything (only the logical one does). Nevertheless I agree that your code is cleaner 
pylon:
I guess it's a combination of the attach/detachInterrupt calls and the wrong sleeping mode. According to the datasheet edge detection of external interrupts needs the I/O clock which is not available in power down sleep. Only a level trigger can wake the processor from power down state. This would mean the processor wakes from the powerdown sleep only by the watchdog interrupt which is set to 8s in the code we saw. So either the code posted yet is not the one used for test with the signal posted in answer #11 or the processor doesn't act exactly as the datasheet describes when edge triggered interrupts are configured and a power down sleep is scheduled.
In all sleep modes external interrupts (INT1 / INT0) can wake up the processor.
Atmel specs:
- Chapter 13 External Interrupts: “This implies that these interrupts can be used for waking the part also from sleep modes other than Idle mode. The External Interrupts can be triggered by a falling or rising edge or a low level”
- Table 10-1: “For INT1 and INT0, only level interrupt” (in power down modes)
@6v6gt – thanks for the info. I checked the specs and was puzzled as my experience is that the processor always (!) wakes up immediately when I have edge detection interrupts and sleep activated (just the 8SEC cycle).
pylon:
Have you tried the sketch without the sleep code and the detach/attach calls?BTW: Why are you setting the pin to INPUT_PULLUP? In my understanding of your external circuit the interrupts gets a clear LOW/HIGH signal. Am I wrong?
Yes I have tried the code without SLEEP as well and I get the exact same behavior. The INPUT_PULLUP indeed is not required in my case. Even when stripping the code to a minimum, changing to a new Uno I see interrupts twice. So there must be something which I am doing wrong?