Is delay required for SHIFT register in Arduino Uno/Mega?

Hi guys, I am a newbie developing a for-fun system that can monitor >100 sensors. Right now I'm using multiple 74HC165N/74LS165N SHIFT registers daisy-chained to increase the input ports for my Arduino Mega.

  • Question 1

While studying the tutorial from these 2 sources:

I notice both of them include delay during latching and clocking:

#define PULSE_WIDTH_USEC   5

digitalWrite(clockEnablePin, HIGH);
digitalWrite(ploadPin, LOW);
digitalWrite(ploadPin, HIGH);
digitalWrite(clockEnablePin, LOW);

digitalWrite(clockPin, HIGH);
digitalWrite(clockPin, LOW);

which is essentially asking the microprocessor to wait 5us before going to next instruction.
However, from the SHIFT register data sheet most of the instructions only require 10-45ns

This got me thinking since Uno and Mega are 16Mhz clock which is 62.5ns per cycle, am I right to say that there is no need to include delays since the microprocessor is "slow enough" for stable latching and clocking for the SHIFT register.

  • Question 2

Is it possible to daisy-chain 13 SHIFT registers so I can have ~100 inputs? Right now I have no problem with 5 of them chained together using unsigned long long for my values datatype since it is 64-bit. I wonder if there is a better method or datatype that can store >100 bits of information if I increase my inputs to beyond 100.

Thank you so much for your time.

Since digitalWrite takes several microseconds there is never a need to include
delays for talking to shift registers (except if you have a very slow oscilloscope and
you want to see the signals).

Since digitalWrite takes several microseconds there is never a need to include
delays for talking to shift registers

What if you use SPI to send the data? SPI is hardware.

The SPI hardware goes upto 8MHz, which is well within the ratings of most 7400

Why are you using LS family BTW? HC is superior and cheaper. You will have
a higher fanout drive to HC chips than LS which sink a lot of current on their

Hey guys thanks for the responses.
After reading your statement "Since digitalWrite takes several microseconds" I delved into its inner details and realized digitalWrite does error checking and stuff hence taking a lot more time. I have reverted using

PORTA &= ~_BV(PA0); 
PORTA |= _BV(PA0);

to communicate (latching and clocking) with the SHIFT register. I measured the timing of these 2 instructions close to 130ns, which is higher than the minimum timing stated in datasheet. It works well so far.

And thanks for pointing out of the potential problems of using LS family, I will change to HC.