I've been looking at some I2S DACs lately, but I'm concerned that I won't b able to interface with them. I can't seem to find much about I2S here, just one bit about how the DUE has it built in, and I recall Paul Stoffregen mentioning that getting I2S to work with the Teensy 3.0 was a pain because of the clock signals or something.
When I look at the datasheets though, the interface doesn't seem that complicated. There appears to be three data lines, two of which are clock signals, and one clock signal is the bit clock and is 16, 32, or 64x that of the main clock. So I guess the main clock signals the end of an integer or whatever. Seems simple enough to bit bang if there were no other way of generating the signal.
So what's the issue? What am I missing here? Or am I worrying over nothing?