It seems I have a bad ATMega328P-PU.
I was originally able to run the chip detector sketch without a problem, but when I went to load the bootloader (UNO configuration) on it, using the Atmega_Board_Programmer sketch, I got many verification errors
Verification error at address 7E71. Got: 0xFE Expected: 0x38
Verification error at address 7E72. Got: 0xFF Expected: 0x11
Verification error at address 7E73. Got: 0xFF Expected: 0xF4
Verification error at address 7E75. Got: 0x3B Expected: 0xE0
Verification error at address 7E7A. Got: 0x82 Expected: 0x8D
Verification error at address 7E7D. Got: 0x3E Expected: 0xC0
Verification error at address 7E80. Got: 0xFF Expected: 0x11
Verification error at address 7E81. Got: 0xFF Expected: 0xF4
Verification error at address 7E82. Got: 0xFF Expected: 0x84
Verification error at address 7E83. Got: 0xFF Expected: 0xE1
Verification error at address 7E84. Got: 0x43 Expected: 0x03
Verification error at address 7E85. Got: 0xFF Expected: 0xC0
Verification error at address 7E86. Got: 0xFF Expected: 0x85
Verification error at address 7E87. Got: 0xFF Expected: 0x34
461 verification error(s).
First 100 shown.
Type 'C' when ready to continue with another chip ...
Now, when I go back and run the chip detector sketch on it, I get the following:
Atmega chip detector.
Entered programming mode OK.
Signature = 1E 01 0F
Unrecogized signature.
LFuse = 62
HFuse = D9
EFuse = FF
Lock byte = 00
Clock calibration = B4First 256 bytes of program memory:
0: FF FF FF FF FF FF FF FF FF FF FF FF FE FF FF FF
10: FF FF FF FF FF FF FF FF FF FF FF FF FF 0E FF FF
20: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
30: FF FF FF FF 1A FF FF FF FF FE FF FF FF FF FF FF
40: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
50: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
60: FF FF FF FF FE FF 33 FF FF FF FF FF FF FF 37 FF
70: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
80: FF FF FF FF FF FF FF 43 FF FF FF FF FF FF FF FF
90: FF FF FF FF FF FF FF FF FF FF 4D FF FF 4E FF FF
A0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
B0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
C0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF 67
D0: FF FF FF FF FF FF FF FF FF FF FF FF FF 6E FF FF
E0: FF FE FF FF FE FF FF FF FE FF FF FF FF FF FF FF
F0: FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
I'm thinking I need to reset each of these addresses to FF. Is this correct? Is it possible?
I don't think is it the setup since I've been able to program 3 others without major difficulties
Sarge