"Sorry, the lines are too clutter, could you please correct it and resend to pcb@seeedstudio.com ."
Nice of them to point out the problem in unambiguous terms 
I assume they are referring to the clearances, but where? It looks OK from what I can tell at that resolution. You say it passes DRC, using their values I assume? Maybe you could post the design files if they are in a format some of us have.
Rob