I’ve an application that I’ve had some USB overcurrent issues with (too much load capacitance → too high inrush) so I’m putting a current limiter in place. I’m also taking this opportunity to add an optional power supply to the device.
I’ve come up with the circuit below (decoupling caps omitted for clarity). U3 is the current limiter, it’s Micrel MIC2005A-2YM5 (PDF)
U4 is the LDO, just whatever 5V, 500mA DPAK is cheapest/available when I go to order.
VRAW would be 6V so the voltage divider is to drop the enable signal to a valid logic high for the limited (1.5V - 5.5V)
My theory is that if there’s no power supply attached then R5 will pull the enable signal low on U3 and this chip will supply VCC limited to 500mA.
If the PSU is attached then the R4/R5 voltage divider will pull the enable signal high disabling U3 and therefore U4 is the sole provider of VCC.
My concern is that if there’s no power supply attached, U3 provides the power but then power backflows across U4, pulls the enable signal high, disables U3, power drops, backflow stops, U3 enables, rinse and repeat.
I’m not very familiar with LDO regulators, is backflow an issue? Searching I’ve found one post suggesting it is but would appreciate any feedback here.
Would a Schottky diode on the output of U4 be an answer? The voltage drop concerns me?