Level shifting with a voltage divider

I need to interface from an AVR to a 3.3v flash IC communication over SPI, and I don't have much space on my board design I'm working on. Is there any problem with simply dropping 5v to 3.3v through a voltage divider?

Clearly, it'll only work in one way, but that's not a problem - just face the dividers the right way.

The only issue I can see if potentially slowing down rising and falling of the SPI signals - can anybody comment on the suitability of this?

I tend to use 1k and 2k2 divider. 1k between the pins, 2k2 to ground on the 3V3 part. This reduces voltages to about 2/3rds, which takes
5V to 3.3V.

Higher value resistors can be used, but the signals will then switch more slowly due to input capacitance - as SPI can be quite fast I'd stick to 1k and 2k2 - I've had this working fine with things like microSD cards for instance.

For signals from the flash IC to the Arduino just connect directly (or add a series 1k resistor to protect the flash chip
should you accidentally configure that Arduino pin as an output).

Arduino will reliably read voltages as low as 3.0V as logic HIGH.

If you take slightly larger values for the v.div, namely 2.4K and 4.7K, and a largish 40pF
estimate for gate capacitance, then the time-constant is R*C= 1.6K * 40pF = 64 nsec.
That's still pretty fast. It would probably work, except at very fast SPI clock frequencies.

For signals from the flash IC to the Arduino just connect directly (or add a series 1k resistor to protect the flash chip
should you accidentally configure that Arduino pin as an output).

I remember reading about interfacing like this because of the low TTL high threshold. I should have thought, many thanks!

However, re the series resistor? Whilst this'll limit current, obviously, how does this protect the 3.3v device from a 5v over voltage? 5v is still going to flow through the 1K?

oric_dan(333):
If you take slightly larger values for the v.div, namely 2.4K and 4.7K, and a largish 40pF
estimate for gate capacitance, then the time-constant is R*C= 1.6K * 40pF = 64 nsec.
That's still pretty fast. It would probably work, except at very fast SPI clock frequencies.

When you say "very fast", faster than the frequency used in the standard Arduino SPI library?

Also, where does the 1.6k come from in the calculation? 4k7 - 2k4 = 2k3... Not from there.

However, re the series resistor? Whilst this'll limit current, obviously, how does this protect the 3.3v device from a 5v over voltage? 5v is still going to flow through the 1K?

It works (and only works) on chips whose input pins utilize built in 'clamping' diodes that conduct if the signal voltage is above the chip's Vcc or below it's Vdd (or ground) connections. So the clamping diode conduct to limit the voltage the input pin actually is subjected to and the external series resistor limits the current flow to the max or less of the rated current capacity of the clamping diodes. So one needs to know what the current capacity rating of the specific clamping diodes for properly sizing the series resistors correctly.

There was even a ATMEL (or maybe PIC) application note showing connecting 120vac house voltage to an input pin of a microcontroller chip, which can be done if the series current limiting resistor is large enough, we talking a meg ohm or more I think!

Lefty

oric_dan(333):
If you take slightly larger values for the v.div, namely 2.4K and 4.7K, and a largish 40pF
estimate for gate capacitance, then the time-constant is R*C= 1.6K * 40pF = 64 nsec.
That's still pretty fast. It would probably work, except at very fast SPI clock frequencies.

Yes probably - but SD and microSD card interfaces are fussy as their I/O is designed for 50MHz signalling
in native mode rather than slow SPI from a microcontroller. A 16MHz Arduino can drive 8MHz SPI, ie clock
high and low times are 62.5ns, so rise and fall times of 20ns or better would be advisable for that I think.
Most devices would be more like 10pF than 40pF I hope.

retrolefty:

However, re the series resistor? Whilst this'll limit current, obviously, how does this protect the 3.3v device from a 5v over voltage? 5v is still going to flow through the 1K?

It works (and only works) on chips whose input pins utilize built in 'clamping' diodes that conduct if the signal voltage is above the chip's Vcc or below it's Vdd (or ground) connections. So the clamping diode conduct to limit the voltage the input pin actually is subjected to and the external series resistor limits the current flow to the max or less of the rated current capacity of the clamping diodes. So one needs to know what the current capacity rating of the specific clamping diodes for properly sizing the series resistors correctly.

Ah, I see - that makes perfect sense.

It also leads me on to another question which I was going to as elsewhere in a new thread about clamping in general; if say, in this example, 5v if fed into a pin instead of 3.3v, when the clamp diodes begin to conduct, is it just the excess voltage that is conducted away to ground, so the pin would still see 3.3v, or does ALL the voltage get conducted away?

The reason I ask is I've just added TVS diode protection in a circuit I'm working on, and was wondering wether the rest of the circuit will remain powered when the diode conducts in a over voltage situation.

Voltage is never conducted away. The current that is caused by voltage is conducted but never away.
The resistor is so that the voltage can be dropped across it as current flows through the diodes. The pin itself is still at the supply voltage plus 0.7V.

A TVS diode is basically a zener (or avalanche) diode and conducts only when the voltage is too high - once the voltage falls to
the threshold voltage it is no longer draining current to ground, so it won't take the voltage down to zero.

You might be thinking of an SCR or thyristor which changes state when it conducts and stays conducting - these devices turn on
either through too much voltage, too fast an increase in voltage or current to the gate terminal. They are sometimes used
in clamps, but are pretty drastic (typically they switch on and cause a fuse to melt, thus protecting the rest of the circuitry in
a unexpected fault situation.

Ah, I see - that makes perfect sense.

It also leads me on to another question which I was going to as elsewhere in a new thread about clamping in general; if say, in this example, 5v if fed into a pin instead of 3.3v, when the clamp diodes begin to conduct, is it just the excess voltage that is conducted away to ground, so the pin would still see 3.3v, or does ALL the voltage get conducted away?

Conducted away is a rather mangled term. With diode clamping the most voltage the input pin will see for a 3.3vdc operated chip is +4vdc to -.7vdc no matter how much more positive or more negative the voltage on the other end of the series resistor is. The excessive voltage is just dropped across the series resistor. It's just a matter of having enough resistance to keep this 'fault clamping current' below the maximum rated current flow of the internal diodes. Note that you can add external clamping diodes to chips that don't have that internal feature and use the same method for making a logic input pin tolerant of over or under voltage limits of the basic chip. Just don't forget the series current limiting resistor or all bets are off. :wink:

Lefty

Yes probably - but SD and microSD card interfaces are fussy as their I/O is designed for 50MHz signallingin native mode rather than slow SPI from a microcontroller. A 16MHz Arduino can drive 8MHz SPI, ie clockhigh and low times are 62.5ns, so rise and fall times of 20ns or better would be advisable for that I think. Most devices would be more like 10pF than 40pF I hope.

Yeah, I was looking at a worst case situation, which still didn't look all that bad. Of course,
if you halve the R values and assume 10pF, then R*C is more like 8 nsec.

Also, where does the 1.6k come from in the calculation? 4k7 - 2k4 = 2k3... Not from there.

Good time to take a look at Thevenin's Theorem. The Thevenin equivalent resistance for the
voltage-divider, when looking into the output node, is the parallel combination of 4.7K and
2.4K, which is 1.6K.