Low power Watchdog?

Hi,
my near-finished is intended to be very low power and most of the time in sleep. It uses standalone ATMega328p with internal RC oscillator as clock source and 32kHz crystal connected to TC2 in asynchronous mode to keep time. This way the average power consumption is around 2uA which is fine for running from a coin cell battery for years. I want to add a Watchdog to be safe. But ATMega’s Watchdog needs 4uA, twice as much as the rest of the application! I need an external Watchdog but I cannot find a reasonable choice. Only suitable IC I know about is TPL5010 (and others in TPL5xxx family) but they are unavailable from stores with reasonable shipping costs (or eBay). So I am afraid I need to build the circuit from discrete components. But Googling for a hint did not give me much. My requirements are:

  1. Timeout more than 6s (wake up interval). It may be much longer and voltage, temperature dependent as long as it is more than 6s under all conditions (i.e. 6s @80°C, 5V and 1 hour @-20°C, 3V is fine).
  2. Power consumption < 1uA (better <0.1uA) as long as the Watchdog is being fed. The consumption may rise when the WDT triggers.
  3. Minimal components count (small board space) is preferred. The ATMega has about 10 unused I/O pins, they may be used to help.

Do you know a circuit that may be used for such task?

Have you heard of thermal resistance. it applies to every circuit you create. you maybe able to use an RTC.

Note: some devices need separation clearances to operate correctly .

UPDATE [10/23/2018]: Above posts have proven my little thought experiment is founded on a false understanding of an Arduino floating input. Thus, I lined it all out.

Just thinking out loud:

  • An interrupt on change, on a digital pin, can be used to wake from sleep.

  • A Digital pin, connected to a small value resistor [say, 2k], with the other side connected to a capacitor, and the other side of the capacitor connected to ground. Then a large value resistor [say, 1MΩ] is connected across the capacitor, which has a value of, say, 10uF.

  • The Digital pin is, briefly, configured as an Output, and set HIGH long enough to charge the capacitor.

  • Then the Digital pin is configured as an Input, with Interrupt On Change [IOC].

  • The Arduino is put to sleep*, and wakes when the first state change occurs [on the input]. Probably when the capacitor drains to around 0.3*VCC.

  • Digital pin is, again, configured as Output to recharge the capacitor, etc.

  • Since there will be only one state change, and that is to wake up the MCU, there is no “excessive current due to floating input” concern.

  • No Arduinos were harmed in this thought experiment.

ReverseEMF:

  • Since there will be only one state change, and that is to wake up the MCU, there is no “excessive current due to floating input” concern.

This is not true. When voltage applied to a pin is close to Vcc/2 there is excessive current consumption (about 100uA) due to the digital buffering. RC circuit makes very slow edge leading for very long time in the “bad area” around Vcc/2. In general simple RC circuit as described cannot be used for low power timing. So I not even considered this which was a mistake:

Smajdalf:
My requirements are:

2) Power consumption < 1uA (better <0.1uA) as long as the Watchdog is being fed. The consumption may rise when the WDT triggers.

As long as everything is fine the Arduino keeps the capacitor voltage high, safely away from the dangerous Vcc/2 area. Only when things go wrong the capacitor is allowed to discharge close to Vcc/2. There is only one problem - it can be only used to generate an interrupt, not reset because the reset pin has internal pull-up. But cleverly adding a transistor should solve this. Thanks!

Assuming your figures are correct, at 6 uA average drain using the watchdog timer, a 220 mAh CR2032 battery should last about 4 years.

I don't see a problem using the watchdog, and using it sure beats adding extra circuitry.

There are other watchdog devices out there, but for the price and what they do the TPL50xx family are a bargain.

You can have 10 delivered for around £10.

Maybe, with a lot of work, and cost you can simulate it with descrete components.

But for £1 a component, I know what my choice would be.

Smajdalf: This is not true. When voltage applied to a pin is close to Vcc/2 there is excessive current consumption (about 100uA) due to the digital buffering. RC circuit makes very slow edge leading for very long time in the "bad area" around Vcc/2.

Then why is there a Schmitt Trigger on the input? I would like a reference to an official document that states this. Otherwise, I don't buy it.

ReverseEMF:
Then why is there a Schmitt Trigger on the input? I would like a reference to an official document that states this. Otherwise, I don’t buy it.

Schmitt trigger has many benefits when edges are slow and/or noisy. But even Schmitt trigger input causes significantly increased current drain when the applied voltage is close to the threshold(s). For more information you may look into this Datasheet of 74HC1G14, single Schmitt trigger NOT gate. Look at Figures 9-12 and explanation in Section 15. In general faster devices (i.e. AHC family) have even higher current consumption.
If you want some AVR related info look into Datasheet of any MCU. In “Power Management and Sleep Modes” → “Minimizing Power Consumption” → “Port Pins” (10.10.6. in my ATMega328p Datasheet but all have such section) is stated:

In sleep modes where both the I/O clock (clkI/O) and the ADC clock (clkADC) are stopped, the input buffers of the device will be disabled. This ensures that no power is consumed by the input logic when not needed. In some cases, the input logic is needed for detecting wake-up
conditions, and it will then be enabled. (…) If the input buffer is enabled and the input signal is left floating or have an analog signal level close to VCC/2, the input buffer will use excessive power.
For analog input pins, the digital input buffer should be disabled at all times. An analog signal level close to VCC/2 on an input pin can cause significant current even in active mode. Digital input buffers can be disabled by writing to the Digital Input Disable Registers (…)

The 100uA figure is my own “research”. It was some time ago and very quick and crude experiment so I may remember it wrong but I am sure it was large enough to make simple RC timing unusable but not so large to damage ATMega even with all pins at worst case conditions - at least at room temperature.

As an example of how effective the TPL5010 can be, I have just got a board working that uses an ATmega1284p @8Mhz, a LoRa device and powered by a LifePO4 AA battery.

The TPL5010 time can be set accuratly with a multiturn pot. The data sheet says 41.9K for 5 mins, and when the pot is set to that value, the sleep time is withing a second or two of 5mins.

When set to wake up from deep sleep on interrupt from the TPL5010, the sleep current of the entire board is circa 0.2uA.

Smajdalf: But even Schmitt trigger input causes significantly increased current drain when the applied voltage is close to the threshold(s). For more information you may look into this Datasheet of 74HC1G14, single Schmitt trigger NOT gate. Look at Figures 9-12 and explanation in Section 15. In general faster devices (i.e. AHC family) have even higher current consumption. If you want some AVR related info look into Datasheet of any MCU. In "Power Management and Sleep Modes" -> "Minimizing Power Consumption" -> "Port Pins" (10.10.6. in my ATMega328p Datasheet but all have such section) is stated: The 100uA figure is my own "research". It was some time ago and very quick and crude experiment so I may remember it wrong but I am sure it was large enough to make simple RC timing unusable but not so large to damage ATMega even with all pins at worst case conditions - at least at room temperature.

Wow! OK..I've been schooled! Thank you.

@srnet: I don't doubt the TPL family is very good device. I just don't know any supplier with reasonable shipping costs. Also it may be considered fun to try to find a solution.

I did some experiments with power consumption of AVR digital buffers. It was powered from an old coin battery and supply voltage was about 2.7V. I tested one ATTiny13A. At first I did some quick comparison of all pins and they seem to have similar characteristics. Than I measured one of them thoroughly. There is result:

Current vs Vin.png

When I finish the circuit I will show it. I looks like it will be evil :wink:

Current vs Vin.png

Data.txt (459 Bytes)

Smajdalf: I did some experiments with power consumption of AVR digital buffers. It was powered from an old coin battery and supply voltage was about 2.7V. I tested one ATTiny13A. At first I did some quick comparison of all pins and they seem to have similar characteristics. Than I measured one of them thoroughly. There is result:

That digital inputs consume more (a lot) of current as the input voltage moves across the transition zone between '0' and '1' has been understood for a long time, circa 1980s, maybe even earlier.

Thats one of the reasons why for, very low sleep currents, you need to be sure that inputs are not left floating around the transition region.

Smajdalf:
I did some experiments with power consumption of AVR digital buffers. It was powered from an old coin battery and supply voltage was about 2.7V. I tested one ATTiny13A. At first I did some quick comparison of all pins and they seem to have similar characteristics. Than I measured one of them thoroughly. There is result:

Current vs Vin.png

When I finish the circuit I will show it. I looks like it will be evil :wink:

Wonderful! Thank you!!

srnet: That digital inputs consume more (a lot) of current as the input voltage moves across the transition zone between '0' and '1' has been understood for a long time, circa 1980s, maybe even earlier.

It is well known "normal" CMOS inputs suffer when being held in the active region and may be even damaged by the resulting "crowbar current" when edges are slow. Schmitt trigger inputs should be safe when edges are very slow or even floating. Some people believe Schmitt trigger prevent increased current consumption under such conditions. Despite it reduces it greatly it is still considerably higher. Which was demonstrated on the ATTiny. It is only one pin of one device at one supply voltage at room temperature but I do not know anyone having such data so I posted them because someone else may find it interesting.

srnet: Thats one of the reasons why for, very low sleep currents, you need to be sure that inputs are not left floating around the transition region.

This is not true. Unless the pin is used to wake up the device the digital buffer responsible for the increased consumption is disabled in deep sleep modes. So pins may float as they wish without any effect on power consumption. Only when the pin is used as a wake up source you need to avoid applying analog signal to the pin (such as sloooowly charging cap).

Its easy to see that both input FETs must be on at some point in the input voltage range for a CMOS chip with a large supply range - for instance an ATmega with a 1.8 to 5.5V supply range must have its input devices start to conduct before 1.8V in order to work at that voltage, so when powered at 5V they will both be conducting in the range 1.8V -- 3.2V, and in fact more like 1V--4V.

Schmitt triggers have no effect on this problem, if they are to work both at 1.8V and 5.5V, the same issue applies in the same way.

The shoot-through current is limited by the very high on-resistances of VLSI MOSFETs (in the 10kohm range).

MarkT: thank you for the clarification. Another Schmitt trigger related myth debunked :wink:

In the end my circuit won't be as evil as I thought. I have planned to use a current starved logic gate but now I have found even more elegant circuit:

Writing WDT_Reset pin HIGH resets the timeout. The circuit works as an astable multivibrator with minimal current consumption when Reset line is HIGH (~300nA with components as drawn).
Q3 works as capacitance multiplier. Without it R3 need to be very high (in GOhm range) or C4 very large (it would take a long time to discharge it by Arduino pin).
Q1 and Q2 create the astable multivibrator. Principle of operation is similar to that described here even though the transistors are connected in a different way. I have breadboarded my circuit and it works well. But I think the linked connection may have some advantages over mine. It is TBD which one is better.

Do you see a catch in the circuit? I know it strongly depend on Vbe and beta of used transistors. Increasing Vbe increase time to trigger as well as increase of beta. Both are temperature dependant but in opposite manner - with increasing temperature Vbe decreases while beta increases. Surely it will not be matched enough to compensate but it should be stable enough to be usable.

Interesting circuit.

The circuit works as an astable multivibrator with minimal current consumption when Reset line is HIGH

Really? With what period?

MarkT: Schmitt triggers have no effect on this problem, if they are to work both at 1.8V and 5.5V, the same issue applies in the same way.

And I was naively thinking it's the same as a comparator with positive feedback [or does the same behavior apply?!?]. A prime example of a black-box elf trying to run with the wizards! :o

I was asked in PM if the circuit actually works. I don't know because I still did not find the time needed to finish this. I have "upgraded" the circuit from post #15. It has a drawback: when WDT_Reset pin is kept HIGH the WDT will never fire. It can be (hopefully) fixed by adding one additional transistor:

I have soldered this circuit on a protoboard and it seems to work well (at room temperature!), I made a PCB but I did not soldered and tested it (yet).

The operation is similar to the previous circuit. The watchdog is reset (that is C4 discharged) by bringing the WDT_Reset LOW shortly. But when it is kept LOW for too long, it will also cause a reset.
The timing depends mostly on C4, R3 + R7 and current gain of Q2A. Higher values mean longer timeout.

The currents used are quite low. As I said before it works well at a room temperature. The timings depends on many different characteristics. Resistance and capacitance of the timing components depends on temperature only slightly but transistors may cause many more problems. At low temperature current gain of the Q2A acting as the capacitance multiplier decreases, shortening timeout. At higher temperature the current gain and leakage of the transistor increases - extending the timeout possibly to the infinity.

From this instability comes another problem: when WDT_Reset is brought LOW too often or for too long it may cause a reset. OTOH if the duty is too low it won't be enough for discharging the C4 enough and it will cause a reset again. It is possible to find the right duty for a fixed temperature and supply voltage. Is it possible for any temperature/supply voltage combination? I don't know. (But if needed it is possible to measure voltage on C4 and change the length of WDT_Reset pulse accordingly.)