I purchased a number of the MAX7219 LED Matrix 4 in 1 modules (8x32). These are 4 of the 8x8 LED matrix displays on a single board, each 8x8 matrix having a MAX7219 chip under it. Mine are the FC-16 style modules.
I tested each module using the MD_MAX72xx library example programs. They work great!
QUESTION: If I create a daisy chain of four of the 4-in-1 modules (16 of the 8x8 matrix displays)
and set max modules = 16 in the library, everything works fine for scrolling text and bit-mapped graphics.
But if I add a fifth or sixth module, I get random corruption in various 8x8 blocks of the display.
For example, if I string 6 of these 4-in-1 displays, that equals 24 of the 8x8 matrix squares in a row.
I set in the library max modules = 24 and compile/upload.
It works for scrolling text, but with random corruption of certain LEDs in some of the blocks.
I am using an external power supply for the LED matrix displays, not from the arduino uno.
I did add bypass and filter caps to each of the modules.
I suspect or get a feeling that maybe there is too much load for the 3 output pins on the Arduino
that are doing the serial clocking? These modules use 3 output pins for CS, CLK, and Data In.
These lines, at least CS and CLK, look like they feed all matrix modules in parallel. I wonder if
this requires something like a 7407 buffer IC between each module set of 4?
Or could it be software timing in the example programs with the library?
It really feels more like TTL signal instability due to how many chips are sitting on the CS and
CLK wires coming from the Arduino.
Ideas? Has anyone built a large diplay with lots of these modules?
Hi Neal, sounds like you may have correctly diagnosed the problem and you have the right general idea about the solution. The technical term is a "fan-out limit" problem, where one output fans out to connect to too many inputs.
If your idea as described above does not work, try connecting the pairs of 7404 directly to the Arduino outputs and connecting a group of 4 modules (16 max chips) to each of the 7404-pair outputs.
Probably, it is not a fan-out problem as the IOH of the UNO IO pin is 20 mA; whereas, the IIL/IIH of a MAX7219 chip is only 1 uA. A single UNO line will safely drive 6xCLK (LOAD) pins of the 6xMAX7219 chips. The problem, most likely, lies in the delay synchronization.
You mention that, according to the chip specs, an UNO output pin will safely drive 6 of the LED MAX 7219 chip inputs. Well, I am using the 4-in-1 moudles. Each module has four 8x8 LED matrix unit, with 4 of the MAX7219 chips. With 5 of the 4-in-1 modules strung together, that means the UNO output pin for CLK is driving 20 of the MAX7219 chip inputs
Now, you said the UNO output pin can drive 20 mA, and the MAX7219 inputs only take 1 uA.
But then, where did you get the mention above for driving only 6 of the MAX7219 chips?
[Or, for fan-out, is the line length and capacitance of the inputs more important than the 1 uA load?
In other words, is it still the case where I need buffer chips?]
To the other poster that mentions it is a signal delay issue on the long lines, can that be true at these speeds? We are updating the display (according to the code in the library examples), once every 100 milliseconds. That is 10hz ? I should hook my scope up to the CLK and CS lines to verify what is going on speed wise, and how clean the signal looks.
Can't hurt to experiment, so when I get time this week, I will try some 7407 buffers.
The problem here is the capacitance of the wiring and multiple clock inputs. One approach is to "bit bang" the shifting rather than using the SPI function. The MAX7221 is specifically designed to overcome this problem, unfortunately most of the available modules use the MAX7219.
The 7407 is totally unsuitable in this application - and is in fact, obsolete. Even if you used the 74HC07, it could actually make the problem worse as it is an open-collector driver rather than a "totem-pole". And its output driving capability was never any better than the Arduino itself.
As per PaulRB's advice use pairs of 74HC04 or 74HC14 gates as buffers to each group of 8 MAX7219s.
To the other poster that mentions it is a signal delay issue on the long lines, can that be true
at these speeds? We are updating the display (according to the code in the library examples),
once every 100 milliseconds.
No, that's not the point the other poster was trying to make. 100ms might as well be 100 years to the chip. The point was the delay between the data pin settling to the desired value before the edge of the clock signal is detected. This delay is much more to do with line capacitance than line length.
I don't have any 74HC04's, but I have a parts draw full of regular 7404 chips.
Is there any harm in experimenting with the regular 7404 chips, or is there a large
difference in the newer 74HC04?
Second, for using these buffers, I assume we are only talking about the CS and CLK lines, right?
It looks like Data-In and Data-Out cascade "through" each max7219 chip, so I don't need to do
anything with those?
Finally, to confirm my understanding; If I want to drive 4 sets of modules, then I can experiment with
using 4 sets of buffers;
A. Take a pair of inverting 7404 gates, and cascade a pair so they are non-inverting.
B. Take my Arduino output pin for CS, and run that into 4 of my non-inverting buffers, connecting
the outputs of these 4 (One each to a set of 8 Max7219 chip displays). Or, regardless of how
many displays I initially experiment with, put a non-inverting buffer pair in series to between
the Arduino output pin and the 8 MAX7219 inputs. I can drive several (2 to 4) buffers with
the one Arduino output pin, and each buffer output can drive 8 of the MAX7219 chips.
C. Wire up the same game for the CLK signal coming out of the other Arduino pin.
This sounds like a fun and easy experiment for later in the week after work.
Let me know if you think I have the above mostly correct.
Nealix:
I don't have any 74HC04's, but I have a parts draw full of regular 7404 chips.
There is a reason you have a parts drawer full of regular 7404 chips. They are almost completely useless! You would not - should not even use them to replace the same chips in faulty equipment (but what equipment?) Any 74xx series IC without the infix "HC" is essentially obsolete.
Nealix:
Is there any harm in experimenting with the regular 7404 chips, or is there a large difference in the newer 74HC04?
Harm - very little. Benefit - highly questionable.
They use entirely different logic levels.
Nealix:
Second, for using these buffers, I assume we are only talking about the CS and CLK lines, right?
It does not apply to the data lines since they are only a one-to-one connection.
Nealix:
It looks like Data-In and Data-Out cascade "through" each max7219 chip, so I don't need to do
anything with those?
Correct.
Nealix:
Finally, to confirm my understanding; If I want to drive 4 sets of modules, then I can experiment with
using 4 sets of buffers;
I know I can happily use two of these modules chained to give eight MAX7219 units so I would consider that a buffered unit. With four pairs of buffers, two for CLK and two for CS, you should be able to drive four sets.
I would also try as an alternative to using the buffers, "bit-banging" the shiftOut transfers so they simply occur slower. "Slower" simply means at microsecond time scales rather than tens of nanoseconds.
Regarding your suggestion: "I would also try as an alternative to using the buffers, "bit-banging" the shiftOut transfers so they simply occur slower. "
I am a second-week newbie to Arduino. From googling after you replied with that, it sounds like Bit-Banging is simply doing the data output using software rather than a HW UART? I mean, we are already using a GPIO arduino pin, and using a software library to control the output bits. So in this sense, are we not already bit-banging rather than using a HW serial UART? Or is there some other example code or tutorial URL that you could share?
Nealix:
From googling after you replied with that, it sounds like Bit-Banging is simply doing the data output using software rather than a HW UART? I mean, we are already using a GPIO arduino pin, and using a software library to control the output bits. So in this sense, are we not already bit-banging rather than using a HW serial UART? Or is there some other example code or tutorial URL that you could share?
I don't know. I don't have your code so I have no idea whatsoever what you are doing. You appear to have omitted that critical detail.
marco_c:
If you want to use bit-banging, use the alternative form of the MD_MAX72xx/Parola class constructor. The default one uses the hardware pins.
Yeah - like I said!
The point is - Marco is the guru/ expert - they guy who wrote the libraries.
There is a switch (i.e., software switch) in the call to the library where you can choose software shifting - "bit-banging" - with the same connections which will slow the transfers and make the timing less critical. If as you suggest, you are only updating the displays ten times per second, even the slower, software shift procedure should be more than fast enough.
I was a big vague earlier as answering before getting off to work, so was not in a position/ mood to check the exact details because I have used the system myself (for eight modules).
I'm having the same problems with my MAX7219 matrix chain. Mine is much larger (100mm 8x8 matrix displays), but I'm pretty sure the same problems are going on. I have been working on this a while and have yet to find a clean solution.
A few points...
If you bought the displays that have MAX7219 chips in them from ebay (like I did), they are fakes - especially if you paid less than $10 per chip. The important thing to understand is that they are not copies, they are fakes. If they were copies, we wouldn't be having the problem. The Chinese chip is completely different under the covers so the MAXIM datasheet is only a guide, not a fact when dealing with these chips.
The MAX7219 is not a SPI chip. It will work with SPI libraries, but the thing to realize is that the CS/LOAD line need only go low just before it goes high. By shrinking the CS pulse, this can help avoid noise.
The real MAX chips are spec'ed at 10MHz clock. I haven't been able to get my chinese chips to go any faster than 4 MHZ. 1 MHz or less seems optimal.
Unlike the real MAX chips, the chinese ones will draw power from the signal lines if they are higher voltage than the power line. If you only have a few displays, then this is not a factor. However, as the Vcc line grows in length, and the load from the modules increases, the Vcc can find itself lower than the signal lines. When this happens, one module at the end can corrupt the entire chain by inserting random spikes on the signal lines.
I am still experimenting to figure out how to deal with #4. The data out line is automatically less than VCC so the next display doesn't usually have a problem with it.
I tried using 3.3V logic to drive the CLK and LOAD lines. The result was that the chinese chips can't handle 3.3V logic very well, however, it actually worked better than the 5V logic.
What I have done with my setup is to use open collector buffers to drive the CLK and LOAD signal lines and used a 10K pullup resistor at the END of the chain. This ensures that the signal voltage will never exceed VCC. So far, this seems to be the best "almost" solution.
Having said all that, my MAX7219 matrix chain is still not working properly. However, the one thing that I am certain of is that the fake max chips are messing with the control signal input lines (which are supposed to only draw 1mA if you go by the datasheet).
Grumpy_Mike:
Yes it is.
All chips do that, including real or fake MAX chips and also any chip I have come across in the last 40 years.
Please refer to the SPI protocol and the MAX7219 protocol and you will see they are not the same. The MAX7219 is nothing more than a shift register. Real SPI chips will not clock if the CS line is high. The MAX7219 will. The fake chips do seem to need at least one clock while the CS is low which is not in the real chips specs.
The fake MAX7219 chips take power from signal lines in a destructive way. They are unreasonably intolerant of signal voltage higher than VCC.
Have you had any success using the fake MAX7219 chips in a long line? Mine get about 2 feet and then start to fail. The design length is 18 modules (6 feet).
The fake MAX7219 chips take power from signal lines in a destructive way.
I keep saying all chips do. Is this something you don't believe?
They are unreasonably intolerant of signal voltage higher than VCC.
Well seeing as every data sheet I have ever seen says the input signal has to be less than the voltage powering the chip plus 0.3V then please define what you mean by unreasonable.
Have you had any success using the fake MAX7219 chips in a long line?
Yes.
The design length is 18 modules (6 feet).
Now that is just a silly length for chained shift registers running at 1 MHz.
I found no evidence that the real MAX chips exhibit the same dysfunction. 0.3V over might be normal for normal chips, but I believe it is much less for these fakes.
I have attached a screen cap from my logic analyzer. You can see the spikes on the CLK and LOAD lines. They are perfectly aligned with the clock transitions - either rising or falling. CMOS chips will draw a little more power during clock transitions, but it shouldn't be enough to feed back into the inputs. Normal chips have pin buffers to prevent that sort of thing.
But getting back to the problem, I need to make this work and unfortunately, I'm stuck with these lousy chips. The MAX7219 design is flawed in that there is no reasonable way to validate that the chip has received the data properly and error free. If I was to do it again, I would just use an mcu with 16 I/O's to drive the matrix and then daisy chain with an IN SPI and OUT SPI (dual SPI interfaces to the previous and next module). That way, the data received can be validated and retransmitted if necessary. The MAX chips are power hogs.
In this case, I am considering inserting a buffer board in between every 3rd module (300mm). It would be powered by Vcc at that point so its outputs are unlikely to exceed Vcc after three more modules.
There is obviously two things going on here. The overvoltage issue plus the buffer current isn't enough to make the trip.
n4mwd:
However, as the Vcc line grows in length, and the load from the modules increases, the Vcc can find itself lower than the signal lines. When this happens, one module at the end can corrupt the entire chain by inserting random spikes on the signal lines.
This is a similar concern to the use of NeoPixel strips.
You haven't really explained what modules you are using. If you have any concerns about power loss when chaining them, then it is patently obvious that you have failed to correctly supply the power. Rather than complaining about it, you need for a start, to run a supply cable of adequate gauge not only to the start of the chain, but also in parallel to the end and possibly to the middle as well.
Here is your illustration:
If SPI does not work, just "bit-bang" the control lines; this will give plenty of setup time at each point. This may take somewhat longer to update your 18 modules, perhaps a couple of milliseconds, but this should be quite adequate for animation.
I found no evidence that the real MAX chips exhibit the same dysfunction. 0.3V over might be normal for normal chips, but I believe it is much less for these fakes.
Sorry but it simply can not be true. The problem with over voltage is that the static protection diodes in the chip become forward biased and so conduct to the rail. This can only happen with an over voltage of 0.3V or more above the supply rail. That is simple physics.
You seem to have successfully hijacked this thread.
