houile:
My problem now is when i send datas in order to open drain x, it opens drain x+1 instead. When a try to open last drain (n°7) of a TPIC chip, if opens drain 0 from next TPIC chip.Depending on if i use one, two or zero 74HCT04 chip, the issue starts from a different TPIC chip. I will try to draw a schematic but it is quite large et and made a lot of changes for testing purpose
74hc04 are inverting buffers, so you should use them in pairs on the same line. If you use just one, the clock and latch signal will be inverted and strange things will happen. Use two together and the signal is buffered but not inverted.