Mega2560 and other SRAM expansion

Designed this expansion SRAM board up to 512kb (HMM628512ALFP-5) with next fetures:

  1. Using only external SRAM interface pins (PortA, PortC, ALE,WR, RD only);
  2. board has 3 addresses window for paging:
    2.1 0-32k - "common page" not switching and below 0x2200 use internal SRAM as is;
    2.2 32k-48k - "low" window for 0..15 low pages about 16k size. Total 256kb;
    2.3 48k-64k - "high" window for 0.15 several high pages with 16k size. Total own 256kb;

Board has additional page register 74HC573D, writing in it by PORTA with low on WR and RD pins. His high and low half-byte is the high and low page numbers, who commutate by address line A14 (PC6) with 74HC257D.

Address line A15 (PC7) in low are blocked 74HC257D to 3-state and produce special page number 0xF that is a part common page.

This design allow commutate SRAM by portions 16k and see 3 part simultaneously and copiing data from one part to next. Previous design SRAM 512kb had 8 segments by 64k and do not enabled this.

Is interesting this?

P.S. Has board design 56x72mm in kicad but can't attachment board photo (error occur)..