I thought the SMC uses both at once to access an SRAM chip. The NRD pin is connected to the SRAMs read enable pin, and A5 is an address pin. What if you need to read from address 16 for example. Read enable would be low (n meaning it is reversed logic), and A5 would be high. This would mean the SMC controller has essentially just shorted the chip out.
It isn't a simple case of always having A5 low either. What happens when you try and write to the SRAM. Read enable goes high, and again you will have just shorted the chip out.
Unless of course it is possible to set PC26 as an input when you are using the SMC. If that is the case then it won't be a problem. I haven't studied the datasheet in detail yet - I am waiting until I have a Due (which the arduino store hasn't shipped yet! :().