I've seen a few of those design designs in multiple PCB's where people just put 2 0.1uF ceramic caps in parallel and with another 10uF cap instead of using a higher capacitance ceramic or electrolytic cap like it this example from spark fun:
Now I don't understand that as it makes the circuit more dangerous and prone to failure not talking even about the extra components you have to mount sins when capacitors fail they simply make a short and putting more of those in parallel just increases the chance of this happening.
By theory 0.1 capacitors should reduce high frequency noise better than 10uF, in practice not always.
Electrolytic capacitors even tantalum very often are source of the moise - 90% of them, so if youy are dealing with low level of the signal it is good idea to check them on oscilloscope.
Look closer. That second 0.1uF capacitor is not connected to Vcc at that point, and a schematic is not really representative of location anyways. What that shows is a 0.1uF and a 1uF capacitor in parallel, which is generally put as close to the Vcc pin of the IC, and is the norm for the vast majority of chips from the manufacturer.
Each does a different task. The 0.1uF is decoupling noise, whereas the 1uF helps prevent voltage sags. The 0.1uF on the bus line is just trying to decouple the bus line, and is probably located somewhere close to the Vcc pin of the module.
With the fast transistions on the chips, and the minute changes in the chip, a steady clean supply voltage and ground are mandatory to achieve performance.
Never seen a decoupling cap fail on low voltage circuitry. Seen a lot of circuits mishave due to
inadequate decoupling though.
Typical recommended decoupling for very fussy or fast logic circuits is 10nF + 100nF (all ceramic) for
each and every supply pin, and often 5..10uF ceramic too. I've seen this for instance for high speed
ADCs and DACs, and faster microcontrollers. Smaller capacitance value goes closest to the relevant
pin to reduce series inductance between chip and capacitor.
More modest logic circuitry the 100nF plus some share of bulk decoupling is normally adequate.
All decoupling on logic chips is to prevent the supply voltage dropping or spiking on rapid current changes
when lots of gates switch together. The very high rates of current change cause even tiny amounts of
stray inductance to drop sizable voltages, ie an inch or two of pcb trace of wire ends up looking like a
few hundred ohms or so to these transient variations, not a few milliohms.
Each capacitor has a different and necessary function, as others have said above.
They also have different locations on the circuit board, depending on the function. The schematic doesn't show this: it just puts them all in one area of the schematic. It helps to understand the rest of the schematic if the decoupling caps aren't mixed in near their "real" locations.
All of the above information is very good. I especially like the video for those wishing to learn the details.
But perhaps a simpler explanation might help (however it does include some simplification).
Simply stated:
A 10 µF capacitor will filter low frequencies (60 Hz - 10k Hz) then it starts to loose its effectiveness and no longer decreases impedance with frequency.
A 0.1 µF capacitor has minimal effect in the below 10K Hz range but above these frequencies it is actual more effective than the 10 µF capacitors, especially around 10 MHz and above.
(Note: some folks might disagree with my listed frequencies but for the most part they convey the principle.)
Now by having both, the filtering is effective from very low frequencies up to those frequencies that are normally related to voltage "switching noise"
Note regarding the reduced reliability or making the circuit dangerous of the "added" capacitor. I believe properly chosen components of even average quality will not change the reliability by any measurable amount.
Lets look at the 10 µF capacitor in the circuit section you uploaded. To me it looks like the circuit is either powering a USB device or receiving power from a USB device. So let say the 10 µF is removed. Experience tells us the end circuit will probably work fine maybe almost all the time, however once and in a while a spike will slip through and reset your circuit.
Now say you are the designed of this device......do you leave out the 10µF cap because to the possible reliability hit OR do you include it to make a better designed product? Its up to you as you are the designer.
All of the above information is very good. I especially like the video for those wishing to learn the details.
But perhaps a simpler explanation might help (however it does include some simplification).
Simply stated:
A 10 µF capacitor will filter low frequencies (60 Hz - 10k Hz) then it starts to loose its effectiveness and no longer decreases impedance with frequency.
A 0.1 µF capacitor has minimal effect in the below 10K Hz range but above these frequencies it is actual more effective than the 10 µF capacitors, especially around 10 MHz and above.
(Note: some folks might disagree with my listed frequencies but for the most part they convey the principle.)
Now by having both, the filtering is effective from very low frequencies up to those frequencies that are normally related to voltage "switching noise"
Note regarding the reduced reliability or making the circuit dangerous of the "added" capacitor. I believe properly chosen components of even average quality will not change the reliability by any measurable amount.
Lets look at the 10 µF capacitor in the circuit section you uploaded. To me it looks like the circuit is either powering a USB device or receiving power from a USB device. So let say the 10 µF is removed. Experience tells us the end circuit will probably work fine maybe almost all the time, however once and in a while a spike will slip through and reset your circuit.
Now say you are the designed of this device......do you leave out the 10µF cap because to the possible reliability hit OR do you include it to make a better designed product? Its up to you as you are the designer.
Yes that video was great! He starts talking about why you put multiple ones at 12:00
and apparently it realy has something to do with the higher switching frequencies with the internal inductive of the caps and the issue that resists just putting a single big cap is the high switching frequencies all Ic's have and the internal impedance of the capacitor hens even the package comes to play here as you need to put smaller packages of ceramic caps for higher switching frequencies.
Here's a thing to think about to help understand just how "fast" fast logic devices are:
Mains (here in the UK) is 240V rms at upto 13A rms per wall-outlet. A 3kW heater uses all
of that capacity and its wiring sees a maximu rate of change of current of about 5 kA/s, which can
of course lead to some induced mains hum in near-by circuits (in fact the 110 kV/s voltage changes are
probably more problematic).
A single 20mA LED driven from an Arduino pin, whose switching time is a few nanoseconds sees a
rate of change of current of about 4 MA/s - around a thousand times more than the mains wiring. This is
why stray inductance becomes important for logic circuits - the conditions are much more extreme.
Although were getting into minutiae here (for hobby circuits), the following are some guidelines:
SMD parts are better at filtering very high frequencies than the leaded versions.
Wiring of the capacitor is critical. For the high frequency parts, ideally one would like the input on one side of the pad and the "output" on the other side of that same pad. (see screenshot)
This general philosophy should be followed on breadboards as well.
The push in lead type breadboards are not very good for high frequency connections.
