DTR from FTDI is push-pull and this is why you add the 0.1uF inline capacitor. When DTR is asserted (low signal), this drops the reset line momentarily before it is pulled to high by your 10k resistor. Time for low-to-high is determined by the RC time constant formed by the 10k resistor and the 0.1uF capacitor.
You can have any number of open-drain/open-collector lines connected to the AtMega reset line. The ATMega has built in reset-circuitry and so a separate reset IC is not required. You can wire your (normally open) push-to-low button directly to the reset pin.