I had a problem in receiving multiple responses of type uint16_t. I send one data each time and then wish to receive one data back. However, the first 3 times the received responses aren't the right responses because they only come from the 4th data.
Here is some example:
*------------ * 9600 - Send 9600 0 0 0 310 - the 1st right response comes here 310 311 310 309 310 311 310 ------------ 16000 - send 16000 310 310 310 521- right response here 522 521 522 521 520 522 521 ------------
Here is my code:
#include<SPI.h>
void setup(){
Serial.begin(115200);
SPI.begin();
pinMode(SS,OUTPUT);
digitalWrite(SS,HIGH);
SPI.setDataMode(SPI_MODE1);
delay(100);
}
void loop(){
int cmd = 0;
int i;
while(Serial.available() > 0 ){
String str = Serial.readString(); // ENTER COMMAND BY TERMINAL
uint16_t interrogation = 0;
uint16_t rep;
cmd = str.toInt();
Serial.println(cmd); // PRINT THE COMMAND
digitalWrite(SS,LOW);
for(i=0;i<11;i++){ // FORCED TO SEND 3 MORE DATAS TO RECEIVE ENOUGH RESPONSE
interrogation=SPI.transfer16(cmd);
delay(100);
Serial.println(interrogation,DEC); // PRINT RESPONSE
}
Serial.println("------------");
}
}
Could anyone explain me what happened ? Is the problem reside on the master code or in slave code ? Thank you in advance !
hoangphithuong:
Is the problem reside on the master code or in slave code ?
The master does not match the slave. The problem is in the master, slave, or both. You have to show the slave code or the desired protocol so we can tell why they don't match.
markd833:
You mention your slave code. So you are talking to another device running code. What is that device and can we see the code for it?
johnwasser:
The master does not match the slave. The problem is in the master, slave, or both. You have to show the slave code or the desired protocol so we can tell why they don't match.
The slave is a dspic33 microcontroller. I defined an interrupt on the RX line of SPI to detect the incoming data from Arduino master and send datas back:
void __attribute__((interrupt, no_auto_psv))_SPI2RXInterrupt(void)
{
unsigned int TX_count=0;
RX=SPI2BUFL; // receiving incoming data
SPI2BUFL= TX[TX_count++];
SPI2STATLbits.SPIROV=0;
IFS1bits.SPI2RXIF = 0; //clear receive interrupt flag
}
Here I changed the code a little to debug the problem a little bit easier. I fixed the response in the slave is {1,2,3,4,5,6,7,8}, and I received in master as follow (the first value is the sent data, the next 8 datas are the responses) :
0 0 1 2 3 4 5 6 7
0 8 1 2 3 4 5 6 7
123 8 1 2 3 4 5 6 7
321 8 1 2 3 4 5 6 7
The first line it's shifted 1 data, the next line is shifted 2 datas.
What I expect to receive is 1 2 3 4 5 6 7 8 from the start.
hoangphithuong:
What I expect to receive is 1 2 3 4 5 6 7 8 from the start.
You need the slave side to load the first 1 into the output buffer before it receives the first byte instead of waiting until it receives the first byte to fill the output buffer.
Another way is to do it is to have the master side send a dummy transaction before sending the first actual transaction. That will get rid of the 0 and the first actual transaction will receive the desired 1.