asymptoticdesign:
Could you elaborate why that is a blunder? I'm not certain what the best practice is, but I tried it with both a pull-up to +12V on a breadboard and it worked just fine.
The ATmega ports have protective diodes which clamp the voltage at a diode drop above the supply voltage (or below ground), so in the first instance, your FET gate will never be allowed to rise above 5.6V.
Mostly, if you define it as an output, it will be pulled closely to either ground or Vcc. If you define it as an input, or at reset and before the pin is defined as an output, the 10k resistor will pull it up to that 5.6V. Presumably that is what you intend; that it defaults to "on". If you thought however that it would turn the FET on "harder" by rising to 12V, you would be wrong. It will be feeding some 700 µA into the pin and protective diode. You will generally "get away with it" but it is certainly contrary to the recommended use of the pin.