Nano ESP32: boot first 300ms to calibrate RTC clock?

I am trying to speed up the boot time after deep-sleep, and activating logs at the debug level, I get the output below.

I don't understand what it means, except that it looks like the first 279ms are spent to manage the RTC clock calibration.

Am I correct?

Do you see any way to fasten this?

I am using the ESP-IDF to develop the app and configure the hardware.

Many thanks!

--- esp-idf-monitor 1.5.0 on /dev/cu.usbmodem101 115200
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H
I (0) cpu_start: App cpu up.
V CACHE_ERR: illegal error intr clr & ena mask is: 0x3f
i (94) clk: waiting fVo r C3A2CkH Eo_sEcRiRl:l actoorre  t1o  asctcaersts  uepr[o0rm 
ntr clr & ena mask is: 0x1f
D (278) clk: RTC_SLOW_CLK calibration value: 15999002
V CACHE_ERR: illegal error intr clr & ena mask is: 0x3f
V CACHE_ERR: core 0 access error intr clr & ena mask is: 0x1f
I (279) cpu_start: Pro cpu start user code
I (279) cpu_start: cpu freq: 160000000 Hz
I (279) cpu_start: Application information:
I (280) cpu_start: Project name:     app
I (280) cpu_start: App version:      a76345a-dirty
I (280) cpu_start: Compile time:     Oct  6 2024 09:34:48
I (280) cpu_start: ELF file SHA256:  b45dfbf0e3d5df62...
I (281) cpu_start: ESP-IDF:          v5.1.4-dirty
I (281) cpu_start: Min chip rev:     v0.0
I (281) cpu_start: Max chip rev:     v0.99 
I (281) cpu_start: Chip rev:         v0.2
V (281) memory_layout: reserved range is 0x3c03ed48 - 0x3c03ed78
D (282) memory_layout: Checking 7 reserved memory ranges:
D (282) memory_layout: Reserved memory range 0x3c000000 - 0x3e000000
D (282) memory_layout: Reserved memory range 0x3fc84000 - 0x3fc95a00
D (283) memory_layout: Reserved memory range 0x3fc95a