The RX FIFO appears to be 32-bits wide but:
3.9.2.5 RX FIFO Size
SPI supports up to 16-bit frame size during reception.
The TX FIFO is 32-bits wide but the high 16-bits are command bits.
43.3.7 DSPI PUSH TX FIFO Register In Master Mode (SPIx_PUSHR)
PUSHR provides the means to write to the TX FIFO. Data written to this register is
transferred to the TX FIFO . 8- or 16-bit write accesses to the Data Field of PUSHR
transfers the 16 bit Data field of PUSHR to the TX FIFO. Write accesses to the
Command Field of PUSHR transfers the 16 bit Command Field of PUSHR to the TX
FIFO. The register structure is different in Master and Slave modes. In Master mode, the
register provides 16-bit command and data to the TX FIFO. In Slave mode, the 16 bit
Command Field of PUSHR is reserved.
Even if you could send 32 bits, the byte order in memory is not in the correct order due to nature of a little-endian fetch from memory to a 32 bit register.
See above for the problem with 16-bit transfers.
The datasheet is not too clear in spots. See point 8 in this list:
TOP TEN THINGS ENGINEERING SCHOOL DIDN'T TEACH YOU (from Rich Ries via Embedded Muse)
10. There are at least 10 types of capacitors.
9. Theory tells you how a circuit works, not why it does not work.
8. Not everything works according to the specs in the databook.
7. Anything practical you learn will be obsolete before you use it,
except the complex math, which you will never use.
6. Always try to fix the hardware with software.
5. Engineering is like having an 8 a.m. class and a late afternoon lab
every day for the rest of your life.
4. Overtime pay? What overtime pay?
3. Managers, not engineers, rule the world.
2. If you like junk food, caffeine and all-nighters, go into software.
- Dilbert is not a comic strip, it's a documentary.