Nina: cannot turn on LED using "bare" ESP32 code

Hi,

We all know that the Arduino Nano RP2040 has two MCU: RP2040 and the ESP32.

So, what I want to do is to turn on the LED directly from the ESP32, using just pure ESP32 code.
According to the schematic, the RGB LED is connected to the ESP32 in GPIOs 25, 26 and 27.

So, what I did was to:

Load the SerialNINAPassthrough sketch.
Then I compiled this very simple ESP32 "blink" code: esp-idf/blink.c at release/v4.2 · espressif/esp-idf · GitHub
* I defined #define BLINK_GPIO 26
* I compiled it using ESP-IDF
* I flashed it using --before no_reset (instead of --before default_reset) in esptool.py

I know that code works, because when I try it on other ESP32 modules it works Ok.

My guess is that my code should just blink the LED, but nothing happens.
What am I missing?

At this point I don't care about having an SPI / UART connection with the RP2040. I just want to flash code to the ESP32 and turn on the LED.

Thanks!

This is weird:

  • I modified the nina-fw sketch. In the loop() I added the blinky code.
  • compiled and flashed it to the ESP32... same results... I cannot see the blinky LED

Then I did:

  • compiled and flashed to the RP2040 the CheckFirmwareVersion sketch (I don't care if it cannot fetch the version).

...same results... I cannot see the blinky LED.

BUT BUT BUT, now with my blinky-led code in the ESP32, and the CheckFirmwareVersion in the RP2040, if I open the "Tools -> Serial Monitor", only now, the LED starts to blink.

It seems that opening the Serial Monitor send an "boot ESP32" chip... but doesn't make sense.
Any idea?

Thanks!

Another issue is the ESP-IDF version.

  • If I try the ESP-IDF "blink" example compiled with ESP-IDF >= v4.0, it doesn't work.
  • If I compile it with v3.3 it works Ok (I have to follow the same steps as before: flash blink to the esp32, then flash the CheckFirmwareVersion to RP2040, and then open the Serial Monitor...)

Anyone else had issues with ESP-IDF >= v4.0 ?
Also, how can I see the output of the ESP32 ? Is there any sketch that prints the output of the ESP32?

Thanks!

Ahhh... mistery solved (I guess...):

  • The ESP32 is not started by default (makes sense, saves energy).
  • When you call WiFi.xxx() it enables it (perhaps by setting HIGH the "ESP32 EN" line... I guess)
  • But the serial monitor was needed because the "CheckFirmwareVersion" sketch has a while(!Serial) at the very beginning... and only after that WiFi.status() is called.

So, to capture the output from the ESP32 I just modified the SerialNINAPassthrough sketch by calling WIFI.status() at the very beginning...

What I still don't get, is why ESP-IDF >= v4.0 doesn't work... I was able to capture the output and I see:

10:39:46.708 -> Rebooting...
10:39:46.708 -> ets Jun  8 2016 00:22:57
10:39:46.708 -> 
10:39:46.708 -> rst:0xc (SW_CPU_RESET),boot:0x33 (SPI_FAST_FLASH_BOOT)
10:39:46.708 -> configsip: 0, SPIWP:0xee
10:39:46.708 -> clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
10:39:46.741 -> mode:DIO, clock div:2
10:39:46.741 -> load:0x3fff0030,len:6968
10:39:46.741 -> load:0x40078000,len:13852
10:39:46.741 -> ho 0 tail 12 room 4
10:39:46.741 -> load:0x40080400,len:4548
10:39:46.741 -> entry 0x400806ec
10:39:46.741 -> e[0;32mI (29) boot: ESP-IDF v4.2.1-141-g1e3638390-dirty 2nd stage bootloadere[0m
10:39:46.741 -> e[0;32mI (29) boot: compile time 10:37:51e[0m
10:39:46.741 -> e[0;32mI (30) boot: chip revision: 1e[0m
10:39:46.741 -> e[0;32mI (33) boot_comm: chip revision: 1, min. bootloader chip revision: 0e[0m
10:39:46.775 -> e[0;32mI (41) boot.esp32: SPI Speed      : 40MHze[0m
10:39:46.775 -> e[0;32mI (45) boot.esp32: SPI Mode       : DIOe[0m
10:39:46.775 -> e[0;32mI (50) boot.esp32: SPI Flash Size : 2MBe[0m
10:39:46.775 -> e[0;32mI (54) boot: Enabling RNG early entropy source...e[0m
10:39:46.775 -> e[0;32mI (60) boot: Partition Table:e[0m
10:39:46.775 -> e[0;32mI (63) boot: ## Label            Usage          Type ST Offset   Lengthe[0m
10:39:46.775 -> e[0;32mI (71) boot:  0 nvs              WiFi data        01 02 00009000 00006000e[0m
10:39:46.808 -> e[0;32mI (78) boot:  1 phy_init         RF data          01 01 0000f000 00001000e[0m
10:39:46.808 -> e[0;32mI (85) boot:  2 factory          factory app      00 00 00010000 00100000e[0m
10:39:46.808 -> e[0;32mI (93) boot: End of partition tablee[0m
10:39:46.808 -> e[0;32mI (97) boot_comm: chip revision: 1, min. application chip revision: 0e[0m
10:39:46.841 -> e[0;32mI (104) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x062c4 ( 25284) mape[0m
10:39:46.841 -> e[0;32mI (123) esp_image: segment 1: paddr=0x000162ec vaddr=0x3ffb0000 size=0x02018 (  8216) loade[0m
10:39:46.841 -> e[0;32mI (127) esp_image: segment 2: paddr=0x0001830c vaddr=0x40080000 size=0x07d0c ( 32012) loade[0m
10:39:46.841 -> e[0;32mI (145) esp_image: segment 3: paddr=0x00020020 vaddr=0x400d0020 size=0x13894 ( 80020) mape[0m
10:39:46.874 -> e[0;32mI (176) esp_image: segment 4: paddr=0x000338bc vaddr=0x40087d0c size=0x02194 (  8596) loade[0m
10:39:46.907 -> e[0;32mI (185) boot: Loaded app from partition at offset 0x10000e[0m
10:39:46.907 -> e[0;32mI (185) boot: Disabling RNG early entropy source...e[0m
10:39:46.907 -> e[0;32mI (187) cpu_start: Pro cpu up.e[0m
10:39:46.907 -> e[0;32mI (191) cpu_start: Application information:e[0m
10:39:46.907 -> e[0;32mI (196) cpu_start: Project name:     blinke[0m
10:39:46.907 -> e[0;32mI (200) cpu_start: App version:      v4.2.1-141-g1e3638390-dirtye[0m
10:39:46.940 -> e[0;32mI (207) cpu_start: Compile time:     Jul  9 2021 10:37:47e[0m
10:39:46.940 -> e[0;32mI (213) cpu_start: ELF file SHA256:  d0ea6e4a6bd57a0c...e[0m
10:39:46.940 -> e[0;32mI (219) cpu_start: ESP-IDF:          v4.2.1-141-g1e3638390-dirtye[0m
10:39:46.940 -> e[0;32mI (226) cpu_start: Starting app cpu, entry point is 0x40081078e[0m
10:39:46.940 -> e[0;32mI (218) cpu_start: App cpu up.e[0m
10:39:46.973 -> e[0;32mI (237) heap_init: Initializing. RAM available for dynamic allocation:e[0m
10:39:46.973 -> e[0;32mI (243) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAMe[0m
10:39:46.973 -> e[0;32mI (249) heap_init: At 3FFB2848 len 0002D7B8 (181 KiB): DRAMe[0m
10:39:46.973 -> e[0;32mI (256) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAMe[0m
10:39:46.973 -> e[0;32mI (262) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAMe[0m
10:39:46.973 -> e[0;32mI (268) heap_init: At 40089EA0 len 00016160 (88 KiB): IRAMe[0m
10:39:47.006 -> e[0;32mI (275) cpu_start: Pro cpu start user codee[0m
10:39:47.006 -> e[0;32mI (293) spi_flash: detected chip: mxice[0m
10:39:47.006 -> e[0;31mE (293) spi_flash: failed to get chip sizee[0m
10:39:47.006 -> assertion "flash_ret == ESP_OK" failed: file "/home/riq/bin/esp/esp-idf/components/esp32/cpu_start.c", line 472, function: start_cpu0_default
10:39:47.039 -> 
10:39:47.039 -> abort() was called at PC 0x400d2647 on core 0
10:39:47.039 -> 
10:39:47.039 -> Backtrace:0x40083e53:0x3ffe3b10 0x400844fd:0x3ffe3b30 0x40087aea:0x3ffe3b50 0x400d2647:0x3ffe3bc0 0x40080ffe:0x3ffe3bf0 0x4008127f:0x3ffe3c40 0x400792aa:0x3ffe3c80 |<-CORRUPTED
10:39:47.039 -> 
10:39:47.039 -> 
10:39:47.039 -> ELF file SHA256: d0ea6e4a6bd57a0c
10:39:47.039 -> 

🤷🤷🤷

And solved.
From the NINA documentation ( https://www.u-blox.com/sites/default/files/NINA-W1_SIM_UBX-17005730.pdf ) it says:

NINA-W101/NINA-W102: When running the command idf.py make menuconfig set the
configuration flag CONFIG_SPI_FLASH_USE_LEGACY_IMPL flag to Y. The application fails to start unless this flag is set.

I did that, and I have "blink" running Ok using ESP-IDF v4.2.

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