Hello,
I have constructed a device that uses Arduino and discrete elements. I supply it by a powerbank 5 V/2 A. What capacitor(s) to use in order to make it better against possible (supply power) noise?
Thank you...
Use a 0.1uF ceramic on all ICs close to the power pins and also add a large capacitor, at least 47uF for overall smoothing.
Grumpy_Mike:
Use a 0.1uF ceramic on all ICs close to the power pins and also add a large capacitor, at least 47uF for overall smoothing.
At least 47uF electrolytic? ceramic?
Electrolytic.
Decoupling isn't to prevent power supply noise affecting chips, its so the chips actually work. Without
decoupling the voltage at the pins will be subject to variations due to changing current load and the
stray inductance of the supply wiring - for very fast logic circuits these voltage variations can be
substantial due to the extremely high rates of change of current (1mA switching in 1ns is equivalent to 1000A
switching in 1ms).
This is why the capacitors need to be right next to the chip, even an inch of pcb trace has enough
stray inductance to be worth worrying about at these speeds. And its also the reason power traces should
be wider than signal traces, wide traces have less inductance.
MarkT:
And its also the reason power traces should
be wider than signal traces, wide traces have less inductance.
I remember the exact opposite was told to me as reason why signal traces should be kept thin...? Or is that stray capacitance?
Power traces should be wider to allow higher current also. Try to get low ESR caps. Or do what you think is right.
wvmarle:
I remember the exact opposite was told to me as reason why signal traces should be kept thin...? Or is that stray capacitance?
Wow. Boy. This gets into the impedance of a trace in a PCB...
To keep it simple, lets just say this. The parasitic capacitance of a signal line in a "good pcb" is what we intentionally design.
That parasitic capacitance dominates what is called the "Characteristic Impedance" of the trace. In alot of applications, this is intentionally set to around 50 Ohm.
The parasitic capacitance (and thus the characteristic impedance) is set by the geometry of the Trace relative to its reference (Ground) plane and other pieces of metal (other planes, traces) around it.
So there is no hard "thin or thick" rule for signal traces (in a pcb). Instead its what characteristic impedance are you trying to design for that trace.
Note a "good pcb" is a controlled stack-up pcb (where those impedances are intentionally controlled by the PCB construction or "stack-up").
Grumpy_Mike:
Use a 0.1uF ceramic on all ICs close to the power pins and also add a large capacitor, at least 47uF for overall smoothing.
Yup. This will work for likely 95% of all (especially low speed) DYI stuff...
For the "big smoother" 47uF (or whatever values in the 10uF range) electrolytic watch the Voltage Rating! Don't use a 6V one. De-rate those bad-boys as much as you can fit size wise. Double is usually a good rule of thumb (so 10V). And if things get "hot", more.
Don't use a 6V one.
Well I don’t think you can buy one, but a 6V5 rated capacitor represents an 80% derating which is the recommended derating figure. I used to work in commercial mass produced electronics and that sort of derating was fine. We never had a capacitor fail at that In millions of boxes.
Of course the power supply is something different altogether.
It is only when the track length approaches a tenth of the speed of light that you want to send a signal are track impedance important. Otherwise is is just down to track resistance causing voltage drops that is important.
wolframore:
Power traces should be wider to allow higher current also. Try to get low ESR caps. Or do what you think is right.
Not really with logic circuitry, the currents aren't big, its inductance that mandates wide traces.
Logic decoupling caps need to be ceramic (MLCC) for very low inductance, ESR is irrelevant as
its always much less important than the inductance at these speeds).
If using thru-hole caps keep the leads as short as possible BTW.
For power circuitry its a different matter of course, and really high power logic chips like CPUs are
a different game altogether, maybe 100 decoupling caps are used and power and ground planes in 6+
layer PCBs are essential to the current handling...