NPN transistor question


Just had a quick question regarding NPN transistors, forgive my i am a mece and just started learning electronics…

My question is this, when you are running an npn transistor in saturation mode (Vc << Vb , ie. closed switch). Do you still get a 0.6 V drop from the base voltage to emitter? Or do you pretty much ignore it, and treat the collector emmiter as a closed switch and all the voltage drops, current depend on your Vc, and any resistors attached in that line?

Also, how close or how much lower does Vc have to be than Vb to run in saturation??

I give up, what is a "mece"? :)

Yes, you will still get 0.6V-0.7V of drop from base to emitter in saturation. I don't understand your question about ignoring all voltage drops and "resistors attached in that line".

Vc and Vb aren't really related by saturation. You should be asking more about the currents. For a given current into the collector pin, the transistor is in saturation if the base current is high enough. The value Vc will depend upon Ic the collector current and will change even if the transistor is in saturation.

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The condition for “saturation” is generally Ic << beta*Ib
Vbe is still a diode drop worth, and Vce-sat is a consequence of the saturation state, rather than a requirement for saturation. It’s a sort of “this transistor is more on than it needs to be to switch the current it’s switching.”

So in saturation mode, if you had a resistor hooked up between the emmiter and ground, the current going through collector-emmiter would still be Ic = (Vb - 0.6) / R1 ? The same as if it was running in active mode? Is the only difference then that the base current is not related to collector current by h?

The base current is always related to the collector current by hfe. Your calculation is correct as long as you remember that Vb is the base-emitter voltage, not the voltage from the base to ground. The emitter’s voltage will increase by Ic*R1 above ground according to Ohm’s Law.

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A resistor between emitted and gnd would be likely to keep the transistor out of saturation, since it Ve would go up with increased Ic, which would tend to reduce Ib (for a given Vb) In fact, this sort of circuit is a common "constant current" driver.

Ok that sort of makes sense, so would the following be true:

For a given NPN, Lets say Vc = 5v, Emitter is connected between a resistor and ground, and we control Vb. No current will flow until Vb is greater than 0.6 V, at which point current will flow and will be Vb-0.6/R1

The current then flowing in from the base will be Ib= Ic/hfe aproximately. Now, as long as we keep increasing Vb from 0.6 until 5V, the current will keep increasing fairly linearly? If we put 7 V at the base, and Vc is still 5v, the Ic will still be the same as it was when Vb was just about 5v. (reached that flat line). Sort of like a pressure relief valve... Does that make sense, you reach the flat line (saturation) when Vb is bigger than Vc by a diode drop?

Now, as long as we keep increasing Vb from 0.6 until 5V, the current will keep increasing fairly linearly?


If we put 7 V at the base, and Vc is still 5v

Then you reverse bias the junction and blow up the transistor. (normally but destruction is not a certainty)

Putting a resistor between emitter and GND complicates things because the collector voltage is no longer “zero”, but instead is dependent on the current through that resistor (which is essentially the same as Ic.) That means that Vbe is also dependent on the output current. As the output current goes up, Vc goes up as well, and Vbe goes down, which tends to reduce the output current. “Negative feedback”! Which is why this can be used to generate a constant current…

Hey everyone, so i started playing around with the npn transistors and figured it all out.. I even made a nice excel spreadsheeet that simulates what will happen for given voltages, currents, etc... So all good. By putting the resistor between emmiter and gnd, it makes it harder to get into saturation mode. This method is usually used for amplifying. By getting rid of the resistor, its easier to reach saturation, which happens when your gate voltage is higher than collector because they are both forward biased... Doesnt zap the transistor, just makes it run like a short and the current depends only on the load resistance...

But now i want to start learning about mosfets, currently i'm looking at enhancement type-p type (+ gate voltage increases your drain-sink current). Now with this type there are two modes, the ohmic or linear region and the active mode. I have some formulas to calculate the current in either case, but how do you know what mode you will be in?