Once again, MOSFET!

Hi guys,

I'm working on a 5x5x5 LED cube and I plan to use 3mm LEDs at 20mA. Each plane will have a maximum current consumption of 25 x 20 = 500mA so I was planning to use a P-CH MOSFET to control the layers. I've found these are quite cheap IRFR9024, but they are not logic-level. the plan is to have it powered from a 5V USB wall plug capable of 500mA (should I bump it up to 1A, just to stay on the safe side?).

I've decided to use FETs to learn something about those semi, but I wonder how can I drive them having a 5V input. By reading the datasheet and if I'm not misinterpreting it, I should be able to drive the FET with 4V enabling a little more than 1A with such Vgs or about 2A with 5V (figure 1 in the datasheet).

Am I misinterpreting the datasheet? Do I need a BJT to drive the FET so to avoid the gate resistor and relative gate voltage drop?

As usual, thanks for your patience and time! ;)

You need a logic level FET to switch correctly, while the FET you have got could work if given enough voltage, you will not get that current with just 5V. Assuming it is Figure 3 that you are looking at, that does not tell you the drain / source resistance only what current you could get it your voltage was high enough.

Logic level P channel FETS are not too expensive, how about this one:-

I was actually looking at figure 1 taking in consideration the two curves at the bottom which should report (if I read it correctly) the current/voltage on the source-drain line...

I know logic level MOSFETS are not that much expensive and I'll probably end up using something like the ones you pointed to (BTW, those FDN304P seem to have a 460mW limit, I was considering AOD4189 with a 2.5W capability) but I'm trying to understand FET usage and how to read their datasheets.

So, for the sake of understanding, figure 3 reports what would be the current I could switch with 5V at the gate if Vds was -25V (source at higher potential than drain), but figure 1 reports multiple curves, with the first two from the bottom referring to a Vgs of 4.5V and 5V at a junction temperature of 25C (which should be a cold start) and things get slightly better when the device warms up (figure 2 with a Tj of 150C).

Do I read it correctly?

When you see a graph marked "Typical" it means just that - half the devices will perform worse than that graph suggests... With power MOSFETs the variability in gate threshold/plateau voltages is about 2V, so you have to bear that in mind - if the "typical" graph shows a plateau at 4V, you'd be pushing it to use the device at 5V since devices will vary from about 3V to 5V plateau.

[ the plateau is where the gate charge increases rapidly as the channel current increases as the device switches on - gate charge roughly matches the charge in the channel]

In general you want the gate drive voltage about twice the plateau voltage for symmetrical switching times, so typical logic-level devices have a plateau about 2.5 to 3V and threshold 0.5 to 1V.

Non-logic level devices have plateau around 6V and threshold about 3V and cannot be used satisfactorally at 5V for fairly obvious reasons.