Overclocking Due over 102MHz gives nothing :-(

I worked with the overclocking routine from Graham (the one from ard_newbie has 2 EFC statements less) and saw that overclocking speedup was really not happening for 192MHz. Next I created sample sketch that does not rely on anything and creates the delay by a for loop with volatile variable executing 3,500,000 times. The piece of assembler code generated for that for loop takes 12 clock cycles, so both for loops together take 1 second with standard Due @84MHz. Also I did not rely on anything from Due for time measuring but used my small oscilloscope (to measure the time taken for 3 HIGH/LOW transitions).

This is oscilloscope display showing 2450ms for 102MHz Due CPU clock:

This is the table where I measured 3rd column with below sketch for MULA values from column 1:

This is the chart that compares measured times with ideal values (3000/(MULA+1)*14):

This is the sketch:

void setup() {
//Set FWS according to SYS_BOARD_MCKR configuration 
EFC0->EEFC_FMR = EEFC_FMR_FWS(4); //4 waitstate flash access
// Initialize PLLA to 114MHz
while (!(PMC->PMC_SR & PMC_SR_LOCKA)) {}
while (!(PMC->PMC_SR & PMC_SR_MCKRDY)) {} 

  pinMode(13, OUTPUT);

void loop() {
  volatile uint32_t i;

  digitalWrite(13, HIGH);
  for(i=0; i<3500000; ++i) {}
  digitalWrite(13, LOW);
  for(i=0; i<3500000; ++i) {}

The last CPU clock frequency where measured speedup is similar to ideal is 102MHz. Not sure whether factor of 102/84=1.21 that can be achieved with 102MHz is worth the effort of overclocking at all.


Hi Hermann,

Did you see my other comments on overclocking recently? Can't remember the link now...

I think you are being a little ambitious expecting 200MHz!! But 114MHz certainly works well, the only problem as you identified in the thread you linked to is that it screws with millis and micros, giving the impression of a slowdown.

I will go find the link so you can see what I am talking about....

http://forum.arduino.cc/index.php?topic=403716.msg2776737#msg2776737 - looks like they buggered up the forum again.... sorry the link doesn't work because some stupid %22 in the link!!


Thanks for the link.

It seems that you got best result in the other thread with 96MHz. If you look into above table 96MHz is the value where the measured and ideal value are only 25ms apart, so 96MHz is a "good" clock frequency.

I wanted to use the 192/84=2.29 factor in measuring speed of light. In this posting I have shown how to get a full port B read every 3 clock cycles. With 84 MHz that is 1000/84*3=35.7ns which is good (light travels 10.8m in that time). With the 2.29 factor the measurements would be only 15.6ns apart which is much better (3 clock cycles):

So in this posting I thought the difference between the rows was 15.6ns, but it seems to be more 28.6ns based on data from above table:

Perhaps I will have to do some moderate overclocking to get better results when measuring speed of light at home with 2x9m measuring distance.