PCB and Schematic Layout

Projects General Guidance
21

The Screw Terminal Connectors?

22

Thank You :slight_smile:

23

In the IP5306 Datasheet, they mentioned the BAT pin as Voltage Sense pin, and in the IC footprint its very near to the SW (Inductor Pin) is it acceptable or will cause issues (I am a beginner to PCB designing, especially the ones with switching regulators and high frequency components).

Thanks :slight_smile:

24

All connectors...

25

Switch mode designs can be tricky to layout and can fail if not done correctly. Since you have no experience, I would find a working design and follow the layout exactly.
Here is an example I found.

26

decisivelloyd1234,

Is the footprint of the USB connector the correct one for the component you intend to fit?

I am asking this question, because we recently had a case where a PCB was designed using a generic USB connector, but the manufacturer of the part fitted numbered their pins from the opposite end.

This meant that the GND and +5V connections were transposed, causing the PCB to draw a high current.
The original poster had spent ages trying to find the fault on his PCB, and even found it difficult to believe the error when it was eventually pointed out to him.

27

That is inherent in the design of the chip so it must be OK.

As to the layout, I'll just make these general comments:

  1. It looks like you have a ground plane but have redundantly also drawn direct ground traces. I doubt if these do any harm but are probably unnecessary.
  2. The data sheet for the TLV6256x has a reference layout which you could have followed a bit more closely. Whether or not it makes much difference I don't know.
  3. Since it is a first board, I'd have added a solder jumper in the VOUT network between the two chips so that in the event if one side was a failure, you could isolate it and still use the board test the other side.
  4. I've learned something as well. I didn't know you could get USB-C sockets with only the 6 "essential" pins. These will be much easier to solder than the full set.
28

Yes.

29

Thank You very much, I will check it out. :+1:

30

Thanks for informing me, I have chosen the footprint from JLC PCB Parts Website, I will check it again.

Thanks :slight_smile:

31

Thank You! I will check the Reference Schematic again.

decisivelloyd1234 32

:+1:

33

Previously, I asked an AI assistant (Gemini) for feedback on my design. Its response alarmed me a bit, as it suggested there was considerable room for error and that EMI could be quite high.

Because of that, I wanted a second opinion and posted the layout here to check whether there were any significant issues I had overlooked.

Thank you to everyone who took the time to review it and provide feedback. Your comments and suggestions were very helpful and gave me much more confidence in moving forward with the project.

:slight_smile:

34

Let's see what Gemini said. Maybe we've all overlooked something that AI knew all the time.

35

That might just be a 'stock' answer that it tells everyone.

36

Here is a breakdown of the critical mistakes, design flaws, and "magic smoke" hazards lurking in your current schematic and PCB layout.

:police_car_light: The "Instant Smoke" Fatal Flaws

1. The Missing Inductor ($L_1$) & Direct Battery Short

The Flaw: In your schematic, the IP5306 switching node (SW, Pin 7) must connect to the battery via a $1,\mu\text{H}$ inductor ($L_1$). However, on your PCB layout (visible on the blue bottom layer), the trace labeled SW runs straight from Pin 7 and connects directly to the BAT net without an inductor in sight!

  • The Consequence: The moment the IP5306 attempts to switch its internal low-side MOSFET to ground to boost voltage, it will create a dead short circuit across your lithium battery. This will instantly destroy the IC and potentially turn your battery into a small firework.

2. The 3.3V Rail is Actually a 4.1V Death Trap

  • The Flaw: Look at your buck converter ($U_2$, TLV62569) feedback loop. Your voltage divider uses $R_6 = 330,\text{k}\Omega$ and $R_7 = 56,\text{k}\Omega$. The output formula for this regulator is:

$$V_{OUT} = 0.6,\text{V} \times \left(1 + \frac{R_6}{R_7}\right)$$

  • The Math: $0.6 \times (1 + 330/56) = \mathbf{4.14,\text{V}}$.
  • The Consequence: Your 3V3 rail will output over 4.1V. If you plug any standard 3.3V microcontroller or wireless module into that terminal block, it will be fried instantly. To actually get $3.3,\text{V}$, swap $R_6$ to roughly $252,\text{k}\Omega$ (or a standard $249,\text{k}\Omega$ resistor).

:chart_decreasing: Layout & Power Integrity Flaws

3. Traces Thin as Dental Floss

The Flaw: According to the datasheet, the IP5306 handles up to 2.1A of charging and discharging current. Your power traces—especially the long, thin line running down the center of the battery holder and the VOUT / VIN traces—look like default 10-mil signal traces.

  • The Consequence: At 2A, these thin traces will suffer massive voltage drops and generate significant heat. The chip will falsely detect a dead battery almost immediately due to the $I^2R$ drop along the trace.
  • The Fix: Make your main power paths (BAT, VIN, VOUT, and GND) thick copper pours or ultra-wide traces (at least 60–80 mils).

4. Zero Thermal Management for $U_1$

The Flaw: The IP5306 comes in an eSOP8 package with an exposed thermal pad underneath (Pin 9) that must be soldered to a ground plane to sink heat. Your PCB layout completely lacks thermal stitching vias underneath $U_1$.

The Consequence: Pushing 2.1A through this tiny chip generates heat. Without thermal vias to move that heat to the bottom ground layer, the chip will quickly overheat and trigger its thermal shutdown ($125^\circ\text{C}$).

:puzzle_piece: Schematic & Logic Errors

5. Broken 4-LED Battery Indicator Matrix

The Flaw: The IP5306 uses a specialized Charlieplexing matrix to drive 4 distinct LEDs using only 3 pins (LED1, LED2, LED3). In your schematic, you have wired LED1 and LED2 completely in parallel with each other, and LED3 and LED4 completely in parallel with each other.

  • The Consequence: Your LEDs will only blink in pairs. You will have a 2-stage battery indicator instead of a 4-stage fuel gauge, and it won't match the state-of-charge logic dictated by the IC. Copy the matrix layout exactly as shown on Page 7 of the datasheet.

6. Duplicate Component Designators

  • The Flaw: You have two completely different capacitors labeled C2 in your schematic (one 10µF capacitor on the VIN rail and another 10µF capacitor on the BAT rail).
  • The Consequence: This will break your Bill of Materials (BOM) generation and cause severe confusion when exporting the netlist to the PCB layout tool.

Quick Fix Checklist

Add Footprint $L_1$: Break the blue SW trace and insert your $1,\mu\text{H}$ power inductor right next to Pin 7.

  1. Fix $R_6$: Change it from $330,\text{k}\Omega$ to $249,\text{k}\Omega$ to save your 3.3V electronics.
  2. Beef up the traces: Turn those thin power lines into thick copper highways.

Rewire the LEDs: Follow the crisscrossed diode matrix shown on Page 7 of the datasheet.

Would you like some help recalculating the feedback network or checking the layout spacing for the high-frequency buck converter loops?

Gemini's Response. Sadly, I dont know mil measurement unit, but my power trace thickness is around 0.75mm to 1mm (30 - 40 mils). And It also warns me on the Feedback Resistor Values for the TLV62565. The resistor values I am currently using are R1 = 330k R2 = 68k.

Btw, what do stitching vias do? I have added them in my PCB Layout, does it significantly decrease EMI or just a static feature.

PCB Updated
PCB Updated1920×3260 968 KB

37

And It also warns me on the Feedback Resistor Values for the TLV62565. The resistor values I am currently using are R1 = 330k R2 = 68k.

According to the datasheet, the output voltage is given by:

imagen
With the current resistor values, the output voltage of your circuit would be:
imagen

If in your design you change the value of R6 (R1 in the datasheet) to the value suggested by the AI (249 kOhm), the voltage you would obtain without altering the value of R7 (R2) would be :

imagen

Now, the datasheet indicates that, to calculate the value of R2, you should use the following equation (using a minimum of 5uA for the feedback current. Larger current values through R2 will improve noise immunity and output voltage accurac y):

imagen

In your design, you use a value of R2 = 68 kOhm, therefore, the current I_FB woul d be:

imagen

The datasheet also shows you how to calculate R1 from R2, whi ch is:

imagen
imagen586×111 4.8 KB

Assuming that you want an output voltage of 3. 3V, th en:

imagen
imagen481×108 4.15 KB

However, you have a value of R1 = 330 kOhm.

If you want to adhere to the minimum value of I_FB established by the data sheet, then:

imagen
imagen589×141 8.96 KB

38

Did you do a design rules check in EasyEDA (Professional) to validate that the board layout corresponded with the schematic ?
It is actually very difficult to verify a board layout picture especially when there are ground pours so a design rules check is mandatory before submitting a board design for production.

39

Ya, it passed DRC no errors.