PCB Design: Wire between pins

Hi.

I’m designing my second PCB board with SMD soldering and I’m curious how far I can go with hand-soldering (all questions are assuming I have a steady hand and a clean and functional soldering iron and some additional flux)

On “Wire.PNG” you can see a ISP-Header and a 0.4mm wire. Is it okay to route the wire between the pins?

Also I’m wondering if it’s okay to route a wire between the edge pins of an atmega328 (TQFP). Like the arrow in the picture “Avr.PNG”.

What do you think?

I also attached the eagle files. I would appreaciate it a lot if someone would have a quick look at it if’s okay at the perspective of PCB design (It’s just a 328 at 3V with a high-side-switched voltage measurement resistor-divider which measures V+).

Wire.PNG

Avr.PNG

Basis-328.zip (80.6 KB)

I don't see it being a problem. You can hand solder SSOP packages by hand which have much closer pad spacing.

you need to download the design rules from the PCB manufacturer and see what their tolerances are. But, generally, yes.

you should run a drc and an erc, before sending it off to the fab.

If you getting the PCB manufactured by one of the many PCB services then a good thing to do is see if they have a design rules file for eagle you can download and use. This will define trace widths, minimum spacing etc. and if your PCB passes this then they should be able to do it.

The soldering process has nothing to do with the paths you can route traces unless you're getting them made without a solder mask (which is silly nowadays), since the trace will be covered by the solder mask.

What matters is the design rules for the board house, and what their required clearance is between the pins. If your board house's design rules are a problem for the example you showed, find a new board house. In 2016, even bargain basement board houses can do way better than that.

Regarding soldering it, you can go at least down to TSSOP. QFN/VQFN is doable too - but you should modify the footprint if you're hand soldering, so the pads extend farther from the chip so you can touch the pad with the iron (which will conduct heat to the rest of the pad that's actually in contact with the pin). Drag soldering works amazingly well - there are videos, pictures, guides, etc - just need a good temp controlled iron, solder, and "no clean gel flux"

If you're talking about etching the board yourself (also silly nowadays - at any sane value of one's time, it's cheaper and faster for a better product; turnaround time is the only advantage, and the product is just so much worse), not unless you're mighty good at drilling holes on target. I was never able to run traces between pins and get acceptable yield. SMD pin header I could get traces through, though.

If the 6 pins in Wire.png are for header pins (~25thou), I would be tempted to place the trace on the outside, maybe on the opposite side.

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Yes, route one wire between the pins is fine. If the square hole is a via to connect ground plains, then why do you need it? The bottom right pin already does it.

Your edge pin wires can be a bit further away from each other, leaving enough space for a wire between them. If they are not power pins, you can also make them a bit narrower than they currently are.

In your design, lots of vias are square, why is that? Only makes it take up more space for no real benefit.

Most of your vias connecting the copper plains are unnecessary. Your trace size is too wide, making it impossible to route between traces etc. Mine are 0.01" wide except for power that are 0.014". Yours are all 0.016".

Your regulator tab's pad is overlapping the pad of the center pin (V+). I don't know if you can fix it. The two pads in the component library may be overlapping. I don't have the library to look into it. Find another component to replace it. The pad for the center tab is also too far from the center tab to be soldered to it.

Place a dot or some other marker at the MISO pin of the ICSP header.

Qdeathstar: you need to download the design rules from the PCB manufacturer and see what their tolerances are. But, generally, yes.

you should run a drc and an erc, before sending it off to the fab.

^ this.

There is no telling what is 'acceptable' without knowing the rules of the fab house you plan on using.

Some have stricter rules than other.

thomai: On "Wire.PNG" you can see a ISP-Header and a 0.4mm wire. Is it okay to route the wire between the pins?

Also I'm wondering if it's okay to route a wire between the edge pins of an atmega328 (TQFP). Like the arrow in the picture "Avr.PNG".

What do you think?

Do it all the time. Use 10 or 12 thou traces for signals if it helps fit stuff in - whatever you board manufacturer is happy with. For power and ground stick to 24 thou or more, ground plane wherever possible.

liudr: Your regulator tab's pad is overlapping the pad of the center pin (V+). I don't know if you can fix it. The two pads in the component library may be overlapping. I don't have the library to look into it.

If it's a 1117-series reg (not at comp with eagle atm, so can't view board), that's fine, since they're electrically connected). I almost every time end up with some DRC errors that I determine to be spurious and ignore.

If you saw the part, you'll see. The thing looks completely wrong. Yeah, the tab is connected to output.

Thank you very much for your comments and reviews.

The board house can handle traces with 8 thou, so when I'm about to compact the board to add the actual circuitry, I'll try 10 thou.

The Via's are square shaped for no reason, it's an eagle default. I added more than needed because I read somewhere it'll provide a better GND. Not sure if it's overkill but I saw it in some other boards, so I did it too ...

The overlapping at the regulator is ok (HT7333).