PCB jumpers

I usually make SS PCBs.

Rather than use wire jumpers, I sometimes use zero ohm SMDs (1210 & 2010) to sneak over a trace.

Rather than going back to the schematic, adding the resistor then recreating the net list;
any suggestions how to add them to the layout to still pass the DRC test in PCB layout?
(perhaps two vias with oposite side trace is the only way)

I use WinQcad but the concept would be the same as other programs.

LarryD:
(perhaps two vias with oposite side trace is the only way)

It has the advantage of showing the intent and actually being valid as a 2-layer layout.
What you want is a way to automatically add pads to the vias. If there’s a way in WinQcad
to create a window in the solder-resist that would do it - perhaps some sort of test-point?

In Altium I would create a pad as a component (I already have many different ones I use for test points) then drop two on the schematic.

But how to do that on the PCB and have it back annotate to the schematic I don't know, not even sure if it would be possible. I think it would be just as easy to swap back to the schem and drop the pads as required.


Rob

I tried the following and it does what I need.

  1. lay down traces to accommodate the 2010
  2. place VIAs at each end
  3. place a trace on the other side to the PCB connecting the 2 VIAs.
  4. Select the Pad traces, 2 VIAs and the opposite side trace
  5. save the block in #4, call it jumper 2010Jumper
  6. load the block when ever I need to make a automated jumper using a 2010 zero ohm resistor.

DRC is satisfied since the 2 VIAs are connected on the other side.

I helps to brain storm.

Thanks

EDIT: See example jumping over 3 - 12.5 mil traces

2014-08-23_17-32-59.jpg

OK, good one, keep DRC happy with the track on the other side that you will never physically make.


Rob

you will never physically make

Correct

Come to think of it, if you etch the top and bottom of the PCB (assuming no platted through holes) a middle or imaginary layer can be used to satisfied the DRC using the same technique.
See image:

  • Red is bottom layer/foil
  • Grey is top layer/foil
  • Blue is the imaginary layer which satisfies DRC
  • Green is the Zero ohm resistor/jumper
  • White Xs are the VIAs which are never used

2014-08-23_18-27-55.jpg