Power managment Verification

Hey yall, if you have some spare time, could you please verify that my circuit for power managment is correct? I am not 100% sure the UVLO part works. It would be greatly appreciated. Note that all that is requirements related, for example current needs and voltage is fine.

intended use:

Have power connected directly to a battery, when battery drops below 3v, cut the power to the whole circuit by turning low the enable pins of the converters as well as the mosfet so that the monitor ic doesnt consume power. If battery voltage is above 3v, check wether or not the power switch is turned on, if so pull high mosfet and enable pins, if not, pull to ground. Other components: Charging ic, 1.8v buck-boost converter,3.3v buck-boost converter,direct battery connection (marked as VDD_HV).

Thanks a lot for your help!

Your scope will show that, won't it?

I have not sent the pcb for manufacturing yet so i cant test it

How did you test the circuit?

Cross-post.

Source and drain of the N-channel fet are the wrong way round.
Assuming the upwards pointing arrow is ground,
Leo..

I did not, I'd have to order a breakout for each individual ic which would cost more than ordering the pcb itself you know. i just want to know if the general concept make sense.

this is better?

Hybernate current of that coulomb counter chip is 0.6uA.
I doubt you can beat that with your external shutdown circuitry.
Leo..

Alright, maybe it is a tiny bit more efficient without the cutoff, but if the sda and scl lines are not pulled up and/or powered by an mcu whilst the monitor ic is on. Wont it screw things up?

What is the self-discharge current of the battery.
Leo..

about 10uA/day best case scenario

Primary lithium cell?

Yes, the whole thing is powered by a 3000mAh lipo battery.

A3Ah rechargeable Lipo has AFAIK a self-discharge of about 200uA (5% per month).
Only Li-SOCL2 is a lot lower.
Leo..

That's why i said best case scenario, manufacturer advertises 3% per month, but I'm pretty sure its closer to 5% . I'm fine with that loss, and im more used to LiPO so I'm going ot stick with that. Can you confirm wether or not having the ic powered up but the i2c lines and host not pulled up or powered is an issue? If it's not an issue, i'll remove the mosfet and use the hybernation mode of the monitor ic instead.

I2C lines idle HIGH, and that's fine as long as the client stays powered.
Only disconnecting VCC (not ground) could power the chip through it's I2C lines.
Leo..

Well, everything including the pull up lines of the i2c would be powered off. so client (monitoring ic) would be powered on but host (mcu) would be off. its going to come down to the same as leaving the sda and scl pins floating. Would that cause trouble? is it going to power my mcu trough its sda and scl pins? i dont think so since its gpios.