Here's an issue I came across while working with the MKR Vidor 4000, and a fix I found for it.
The Vidor module was working OK with small example projects in the FPGA, but when I put in a design of my own that used more of the FPGA's logic capacity, I found that it wouldn't start up when I connected power. I found that the +3.3V pin was at 2 to 2.5V, and the module was drawing almost exactly 100mA from its 5V power source.
Studying the schematics, I found that when you power the module through either the USB port, the +5V pin, or the VIN pin, the power has to pass through a battery-management chip. (This is to support the option of powering the module with a Li-Po battery.) This battery-management chip (U12, a BQ24195LRGET) has the ability to detect what type of USB power source is connected, and limit the current it draws from that source. The first issue that occurred to me was that this isn't going to work when power is supplied through the +5V or VIN pins, and there is nothing connected to the USB port. But I found that it was no better when using a high-current USB charger, and there's a reason for that.
Fig.1 is a cutting from the schematic, where the USB signals connect to pins 2 and 3 of the battery charger IC, via the 0R links R59 and R60. Fig. 2 is a photo of that IC.
See the pair of tracks snaking below the IC? These are the USB signals, and you can see that between these tracks and the IC there are positions for two chip components which are not fitted: these are R59 and R60 on the schematic. So it doesn't matter what power source you used, the battery-management IC will always use its default current limit, and draw no more than 100mA from it.
Now you could try soldering some wires across the pads where R59 and R60 should be. But there may be some reason the manufacturer left these links off (perhaps it interfered with USB operation?) and anyway I didn't want to power from the USB connector, I wanted to use the +5V pin. My solution was to connect together pins 2 and 3 of the IC without making any connections to the USB signals, by adding a wire as shown in fig. 3.
This makes the battery-management IC think that the USB data lines ares shorted together, which signals that the power source is capable of supplying 1.5A. This has successfully fixed the issue for me.
I have since realised that there may be an alternative, software-only, solution to this problem. If 100mA is enough to power up the module to the point where the user application in the microcontroller is running, and it's only when the FPGA is configured that the power is insufficient, then you could try making the microcontroller write a register in the battery-management IC to tell it to set its current limit to 1.5A. This is a I2C write (write value 0x35 to register 0) that the micro would have to do before triggering the FPGA configuration process. I know that writing this register can change the current limit, but I've only done this from the FPGA, not the microcontroller, which is not so useful.
For reference, the I2C address of the IC is 0x6B, so you should just need to send the bytes 0x00, 0x35 to this address in a write transfer (fig. 4).