Program upload - ATMega2560 - using FTDI (DTR) line to auto-reset [solved]

Hi Fellow Arduino-ites.

RE: Problem program uploading to ATMega2560 breakout using FTDI (DTR) line to auto-reset - not making connection

I'm attempting to upload the Blink example to a standalone ATMega 2560 (breakout board) http://jkdevices.com/ATMEGA2560 (no datasheet, but chip came pre-loaded with Arduino bootloader. All the required Gnd/5v/Xtls pins and caps are connected and I'm using a Sparkfun FTDI 232 with it's power circuit, Rx Tx and DTR connected. (schematic https://www.sparkfun.com/datasheets/DevTools/Arduino/FTDI%20Basic-v21-5V.pdf ) Verbose output (below) gives detail about avrdude not establishing connection on upload. (The boards.txt file is using wiring, not STK500v2 as this seems to work with a standard factory made board using Arduino IDE 1.0.3)

So my question concerns the DTR reset line - currently I have a 100 nF cap between pin 30 (RESET) and the DTR pin (with 10K to +5v on the line too) and thought this might auto-reset the Mega prior to upload. (I've had this auto-reset method working fine on an ATMega 328 in the past, but without the 10K to 5v line present). The Sparkfun FTDI 232 DTR line out in the schematic doesn't have anything else attached, whereas the ATMega2560 DTR line coming in from ATMEGA16U2-MU IC has a 1K RN 3D resistor to ground added in. (http://arduino.cc/en/uploads/Main/arduino-mega2560_R3-schematic.pdf)

Might this need to be added into the 2560 breakout board circuit to get things running? Thanks!

Error code:

Binary sketch size: 1,632 bytes (of a 258,048 byte maximum)
/Applications/Arduino.app/Contents/Resources/Java/hardware/tools/avr/bin/avrdude -C/Applications/Arduino.app/Contents/Resources/Java/hardware/tools/avr/etc/avrdude.conf -v -v -v -v -patmega2560 -cwiring -P/dev/tty.usbserial-A700eEyr -b115200 -D -Uflash:w:/var/folders/au/auLACXDCHOWN6We88ME8DE+++TQ/-Tmp-/build6369485092471295467.tmp/Blink.cpp.hex:i 

avrdude: Version 5.11, compiled on Sep  2 2011 at 18:52:52
         Copyright (c) 2000-2005 Brian Dean, http://www.bdmicro.com/
         Copyright (c) 2007-2009 Joerg Wunsch

         System wide configuration file is "/Applications/Arduino.app/Contents/Resources/Java/hardware/tools/avr/etc/avrdude.conf"
         User configuration file is "/Users/rcarthew/.avrduderc"
         User configuration file does not exist or is not a regular file, skipping

         Using Port                    : /dev/tty.usbserial-A700eEyr
         Using Programmer              : wiring
         Overriding Baud Rate          : 115200
avrdude: wiring_open(): releasing DTR/RTS
avrdude: wiring_open(): asserting DTR/RTS
avrdude: Send: . [1b] . [01] . [00] . [01] . [0e] . [01] . [14] 
avrdude: ser_recv(): programmer is not responding
avrdude: stk500v2_ReceiveMessage(): timeout
avrdude: Send: . [1b] . [01] . [00] . [01] . [0e] . [01] . [14] 
avrdude: ser_recv(): programmer is not responding
avrdude: stk500v2_ReceiveMessage(): timeout
avrdude: Send: . [1b] . [01] . [00] . [01] . [0e] . [01] . [14] 
avrdude: ser_recv(): programmer is not responding
avrdude: stk500v2_ReceiveMessage(): timeout
avrdude: Send: . [1b] . [01] . [00] . [01] . [0e] . [01] . [14] 
avrdude: ser_recv(): programmer is not responding
avrdude: stk500v2_ReceiveMessage(): timeout
avrdude: Send: . [1b] . [01] . [00] . [01] . [0e] . [01] . [14] 
avrdude: ser_recv(): programmer is not responding
avrdude: stk500v2_ReceiveMessage(): timeout
avrdude: Send: . [1b] . [01] . [00] . [01] . [0e] . [01] . [14] 
avrdude: ser_recv(): programmer is not responding
avrdude: stk500v2_ReceiveMessage(): timeout
avrdude: stk500v2_getsync(): timeout communicating with programmer

avrdude done.  Thank you.

Your reset wiring sounds correct. Are you sure your wiring the xmit and rec pins correctly from the FTDI to the mega board? FTDI TXD pin #1 should wire to the mega RXD0 pin #2 and FTDI RXD pin #5 to mega TXD0 pin #3.

Lefty

Gnd is connected also? You say power circuit, so I would guess you did.

Hi Lefty & CrossRoads, thanks for both of your replies.

Yes, the Rx (Mega pin2) is connected to TX on the FTDI and visa-versa. The +5v from the FTDI is connected to Pins 10, 31, 61, 80 & 100 with the reset pin 30 connected via a 10 K resistor and to DTS via the 100 nF cap. As for the Gnd, I have Mega pins 11, 32, 62, 81 & 99 connected. All pins that require them include 100 nF caps as indicated in the schema. Additionally, pins 33 & 34 run via a 16Mhz xtl to GND via 2x 100 nF caps.

EDIT: Looking again at the schematic for the 2560 (link above), I just realized that the 'Y1' caps from the xtl to GND show no cap value & I had used 2 x 104's (100 nF) in there... based on my experience with these xtls, I think they should be 103's = 22pF caps. Will swap out and report back tomorrow. Thanks,

Rich

Hi Lefty & CrossRoads, sorry. Yes the 22pF caps allowed the xtl osc to do it'd sio2 job. All is working as it should. LOTR - R.