Question about addressing RAM DDR2

I have a question about PC DDR2 SO DIMM RAM (200 pin) module.
Generally microprocessor accesses to the SDRAM in the module through Ram Controller (producing addresses signals needed as Row Col and Bank).
I can't understand what happens during single operation (Read or Write).

Supposing the module has 8 SDRAM inside. Is it always needed to access to all 8 SDRAM during single oepration, or is it possible to access only to subset of SDRAM (i.e. only to first and second)?

If you don't want all the data you ignore it. The DRAM module's job is maximum data bandwidth so it will always send the whole 64 or 128 bits or whatever it is on every clock edge while in read or write modes. The normal mode of operation is burst-mode since the memory controller is reading or writing whole cache lines (typically a multiple of 512 bits).

If your are thinking of interfacing to SDRAM pick an earlier easier tech like SDR100 which is single-data rate and can go down to a few megahertz minimum IIRC.

I think you are asking about page mode addressing where the
highest order address bits select the correct page of memory
to access. The lower order bits are common to all pages.

Many thanks or your replies.
My question responds to a need that arises from looking to interface DRAM Controller in microcontroller to DDR2 MODULE (if it's possible).

DDR2 SDRAM Interface has this I/O signals:






DDRDQ0 / DDRDQ15 (data)
DDRA0 / DDRA15 (address)

I can interface only one SDRAM inside the DDR2 module with the uC's Interface . I suppose I should to connect this signals to the SDRAM through the SO DIMM connector, leaving to ground the others (addresses data and controls).

Can it be done?

Why do you want to do this? I think you are probably going down the wrong path.