Question about capacitors

I'm a bit confused and in need some clarification, if anyone can help ....

In almost all circuits I've come across using integrated circuits, it seems wise - if not necessary - to place a smallish (e.g. 0.1uF) capacitor across the Vdd/Vss pins, as I understand it to stop any noise from the power supply affecting the operation of the chip (so, did I understand correctly?). That seems perfectly sensible and I can see why it's applied separately to almost every IC in the circuit .

However, I've seen that it's also common to add another, larger capacitor (e.g. 10uF) across the power supply to the whole circuit - which I'm assuming is for a similar reason (is it?). The terminology is probably wrong, but is the smaller capacitor at chip level a bypass capacitor, and the larger one at power supply level a decoupling capacitor? If not, I'd appreciate some clues as to what these terms mean.

Finally, I've also read that capacitors in parallel have an effective capacitance of the sum of the individual capacitances. So, if I have a circuit with only one IC that needs protecting, can I just use a 10uF capacitor in place of the 0.1uF? Or is there something about the nature of these two components that makes it better to put them both in parallel even if they are right next to each other? The larger capacitor is usually an electrolytic too - is that just because they offer larger capacitance or does the polarisation matter (other than making sure you've got it the right way round)?

I hope you can see my confusion?

Thanks in advance for any enlightenment ....

Roger

I guess a simple reply would be that both being different types, each having desirable characteristics that are required in the circuit. The smaller capacitor works better to bypass high frequency noise and ringing, the larger capacitor works best at filtering lower frequencies (ripple, load surges, etc).

RogerRowland:
I'm a bit confused and in need some clarification, if anyone can help ....

, as I understand it to stop any noise from the power supply affecting the operation of the chip (so, did I understand

Roger

It also prevents noise from the chip itself from coupling onto the supply rail.
Fast logic when switching will cause a signal on the power supply rail.

dlloyd:
The smaller capacitor works better to bypass high frequency noise and ringing, the larger capacitor works best at filtering lower frequencies (ripple, load surges, etc).

But when they are effectively in parallel, isn't it the same as just a single, slightly bigger capacitor? Maybe a 0.1uF ceramic or polyester cap "reacts" faster than a 10uF electrolytic? Perhaps I'm labouring the point, but I'm still curious .....

Boardburner2:
It also prevents noise from the chip itself from coupling onto the supply rail.
Fast logic when switching will cause a signal on the power supply rail.

Ahhh, I hadn't considered that - then it makes sense to put the smaller cap as close to the chip as possible .... thanks :slight_smile:

A capacitor which is only a capacitor exists only in the books.
All actual capacitors have parasitics elements :
They have wire to connect it : wires are not supra-conductor more there are longer more they bring l resistor and inductor.
The electrolyte material bring equivalent leakage resistor
and so on........and so on
This explains why large capacitors are more suitable for low frequency and small capacitor (especially ceramic) are more suitable for high frequency.

RogerRowland:

Boardburner2:
It also prevents noise from the chip itself from coupling onto the supply rail.
Fast logic when switching will cause a signal on the power supply rail.

Ahhh, I hadn't considered that - then it makes sense to put the smaller cap as close to the chip as possible .... thanks :slight_smile:

You will often see them referenced as Decoupling capacitors.

RogerRowland:
In almost all circuits I've come across using integrated circuits, it seems wise - if not necessary - to place a smallish (e.g. 0.1uF) capacitor across the Vdd/Vss pins...

This is widely accepted as a necessary practice. Hard to find a manufacturer's datasheet that does not mention it. If the circuit doesn't work, and the manufacturer's recommendations have not been followed, they wouldn't give a person the time of day and rightly so. Indeed some -- even many -- circuits may operate without bypass capacitors under certain conditions, but that most definitely does not make it acceptable. Lots of equipment is built with one or more bypass capacitors on each chip; there is a reason for this else the trouble and expense would be avoided.

Some good reading here that may clarify some of the questions you raised:
http://www.thebox.myzen.co.uk/Tutorial/De-coupling.html

http://www.analog.com/static/imported-files/tutorials/MT-101.pdf

Decoupling is needed in high speed logic because it is high speed. This means
voltages changing at 10^10 V/s and currents switching at 10^8 A/s. This means
that stray inductance and capacitance are not small things, but impossible to ignore.

For instance a few inches of PCB trace between your voltage regulator and each IC
becomes a large impedance that cannot maintain the supply at the chip at all, instead
it will wang up and down by as much a volt or more at nanosecond timescales - simply
due to the inductance of a few inches of wire. This can cause all sorts of problems
and chip malfunctioning, and the solution is to provide significant capacitance to the
supply pins of the chip_right next to the chip_.

100nF is normally used as a good safe value that's going to work in most cases. Larger
values might be needed for higher currents. Its a rule of thumb that's easy to remember.

The next problem is that voltage regulators (especially switching regulators) take time
to response to changes in load, several us or more, so that a larger capacitor is needed
at the regulator to even out the changes in load to a timescale the regulator can manage.
Values of 10uF to 100uF are common for this. This stops drooping and peaking of
supply voltage when a chip goes in and out of low power mode, for instance. Or rather
spreads those droops and peaks out in time reducing the amplitude.

Very fast chips(*) require a 10nF decoupling capacitor within 1mm of the pin, then 100nF
within 5mm of the pin, or something like that, and usually 10uF somewhere on the board.
Very fast means chips with internal circuitry that can switch on timescales of 100's of ps,
ie sub-nanosecond.

If you look at a computer PCB you'll see an array of tiny 10nF decoupling capacitors on the
back of the board underneath each BGA package, to provide high speed decoupling to all
the many supply pins. Most fast chips use layers of the metallization forming the
interconnect as smaller capacitors integrated onto the chip (modern chips have upto
perhaps 15 layers of interconnect wiring, so using some of them as power / ground planes
is standard as the highest speed decoupling.

In short decoupling capacitors are needed for fast switching circuits to hold the supply
solid against the onslaught of all the rapid current and voltage changes in the device.

(*) 100's of MHz clocking.

Note that that link to analog's website is about RF analog chips, not logic. The same
principles apply except that in the digital domain you want more than enough decoupling
to guarantee no errors. In the analog world you are just wanting to improve signal
to noise ratio.

dlloyd:
Maybe a 0.1uF ceramic or polyester cap "reacts" faster than a 10uF electrolytic? Perhaps I'm labouring the point, but I'm still curious

And that is precisely what is being explained to you. Aluminium electrolytics consist of a coil of interwoven foil, which clearly has significant inductance. Tantalum "blob" capacitors have a different structure, and much lower inductance, so they can be closer to the ideal capacitor which can serve in both roles. Unfortunately, I do believe they have been frowned upon in recent years due to a bad batch from a major manufacturer (as well as need I say it, cost).

MarkT:
For instance a few inches of PCB trace between your voltage regulator and each IC becomes a large impedance that cannot maintain the supply at the chip at all, instead it will wang up and down by as much a volt or more at nanosecond timescales - simply due to the inductance of a few inches of wire. This can cause all sorts of problems and chip malfunctioning, and the solution is to provide significant capacitance to the supply pins of the chip_right next to the chip_.

But even then, the inductance of not only the interconnects, but also the supply lines is still a problem, so at least one supply line, the ground, needs to be of extremely low inductance and be implemented as a dedicated, solid layer. Preferably a dedicated layer for each supply line so that the two adjacent layers are in themselves, a capacitor.

MarkT:
Decoupling is needed in high speed logic because it is high speed. This means ...

---- snipped loads of useful information ---

Excellent info, many many thanks - that was very helpful .......

Paul__B:
But even then, the inductance of not only the interconnects, but also the supply lines is still a problem, so at least one supply line, the ground, needs to be of extremely low inductance and be implemented as a dedicated, solid layer. Preferably a dedicated layer for each supply line so that the two adjacent layers are in themselves, a capacitor.

If you actually do the calculations the capacitance of power planes in a PCB is
inadequate to decouple all the chips, perhaps a few 100pF, its the low inductance
that really matters (and the ability to screen one side of the PCB from the other is
very useful too).

Incidentally electrolytics are not usually wound inductively (try it, its not easy to do!), but
the plates are so long (wound up ribbons) that the propagation delay across the plates
is significant at ns timescales (light travels about a foot in 1ns, signals on a capacitor
plate travel perhaps 10cm in 1ns (depending on dielectric constant). Thus only a small
portion of the plates is doing the work at these speeds, and often there are long thin leads
with inductance leading to the plates...

Multi-layer ceramic caps also suffer from this issue, interestingly, due to
the massive dielectric constant slowing signals down (perhaps a few mm per ns),
but they are only a few mm across to start with.

A friend had a high voltage cap fail recently and took it apart - aluminium coated
plastic film perhaps several 100 metres long - but it was designed for 50Hz operation
so not an issue at all (wavelength of light at 50Hz is 6000km)

Capacitors will soak up and release their charge at different rates dependent on their size. So they all have different resonant frequencies.

To smooth out a DC source that may drift up and down, a few times a second, a nice big capacitor will do the job nicely, but it will be useless at suppressing high frequency signals. Hence the tiny capacitors will do the same job as the big ones, but for unwanted high frequencies.

Capacitors will soak up and release their charge at different rates dependent on their size.

Based on their construction.

MarkT:
If you actually do the calculations the capacitance of power planes in a PCB is inadequate to decouple all the chips, perhaps a few 100pF, its the low inductance that really matters.

Actually such capacitance, distributed over the board area and in combination with the low inductance, would be very useful in decoupling transients. Clearly you always need the formal bypass capacitors, but noting your comments about multi-layer ceramic caps, this low but really robust capacitance clearly plays a part.

Fussy point: You appear to be using cut-and-paste from a word processor to compose your replies. You need to kill word wrap before doing so. I presume you do this to overcome the "Broken" fail in the forum software. I do not have a problem with this as I simply use "Reload" in the browser and "Resend" the form data, as many times as necessary, to get my message through. It is also faster than the cut-and-paste.