I looked over some of the Atmel design suggestions, which re-iterate time and again to isolate the oscillator and the analog inputs using trenches to isolate the ground plane that surrounds them to either keep the disturbance in (oscillator) or to keep disturbances out (analog inputs). Admittedly the AVR2005 note is for a 2.4Ghz transmitter, the AVR040 is on EMC considerations, and AVR042 is on hardware design considerations - which may or may not apply, but it got me thinking.
For example, another suggested design feature is the use of a de-coupling capacitor on every single VCC / GND input pair. Yet, these design features appear to have been incorporated differently into the UNO. For example, the AVCC and the VCC use the same 100nF decoupling capacitor, the ground plane around the resonator does not appear to be trenched and bonded, etc. I am sure there is a reason that the board was designed this way. Are the Atmel suggestions simply something to consider for peak performance since the Atmegas seem to be functioning just fine?
Now, if trenches are a good idea to cut up the ground plane (the ground plane is currently almost continuous, just 3 or four penetrations other than through-hole connectors) where is the best 'exit' for the analog signal ground to board ground? I assumed it would be close to the AGND pin... under the CPU. AVR2005 suggests isolating the oscillator and its capacitors and having a single thin ground connection back to the big ground pad under the processor. The CPU ground pad on my board is pretty much en-route to the ground pin for the voltage supply so I wouldn't be requiring unnecessary additional signal paths.
The board (like the UNO) also does not feature the perfect star distribution system that designers are apparently supposed to strive for. Like the UNO, the board power comes in at a corner. However, unlike the UNO, I have a fat ring of 5V running around the perimeter of the board. 5V leads snake across the board from the ring and bisect it in both directions, creating a grid of 5V buses. I saw this design suggested by a EE professor in a presentation on good PCB design practices and it made sense to me (i.e. minimize the voltage drop and create something as close to a star topology as possible without actually having a power supply that is centered inside the PCB). Does the above seem like a good idea?
Just curious since I am a manufacturing guy, not an EE... cheers and thanks.
In my understanding, cutting out parts of a ground plane is never a good idea. It may have been at some point in time, but the industry's understanding of electromagnetic effects on PCB's does evolve. For the longest time people thought sharp corners on PCB traces were a problem and everything should be chamfered or radiused (it makes no difference )
Separate decoupling caps on VCC and AVCC would indeed be optimal, but as you say, it "seems to work" fine with a single cap for both. It is possible that ADC results are noisier as a result, but I don't know either way.
Not really understanding your AGND question. It sounds like you have a board designed but without seeing it it's tough to comment.
A "star distribution" system is really only suggested for separating noisy circuits from other circuits. Most commonly, in the Arduino community I suggest a star-ground on motor drive systems, to keep the noisy motors from interfering with the Arduino and causing ground bounce and whatnot. On a single PCB that draws 50mA or less, a star ground system is probably not a consideration.
The fat 5V ring is not a bad idea to simplify routing but on a 2 layer board it's really just an approximation of "the right answer": a full power plane. I doubt it's necessary if you have decoupling caps on each device. Again, for a board that draws 50mA, it probably doesn't matter.
The thing you should try to do before anything else is have as close to a solid ground plane as possible. On a 2 layer board, this means having as much "ground" on one layer (likely the bottom) as possible. Move traces around to make this pseudo-ground plane as connected as possible (even use top-side traces to connect patches of the ground plane that just won't connect due to traces). Make decoupling caps connect directly to the IC's using as short a wire as possible.
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That's good news regarding the solid GND layer - which is pretty much what I have. I cut trenches into it after the fact but the exercise seemed somewhat counterintuitive given the boards that are on the market versus what Atmel is advocating for. I wonder what is motivating their positions in these application notes then.
The de-coupling caps weren't too hard to implement - the board still had room and it allowed me to move traces as needed.
The AGND-GND question came from the trench question - if one has to trench around the AGND area, where is the best place to 're-connect' to the regular GND on the board? That's kind of a moot point now that the trenches are going bye-bye.
Seeing that the power consumption is likely going to be minimal as you suggest and that the board is not driving motors, I'm not going to worry too much about the star distribution system either. A fat ring, a nice 100uF cap to keep things level ought to go a long way towards stability in conjunction with all the de-coupling caps around the board.
If/when you can't manage a good ground plane, you should provide a separate ground connection point or points on the board for the ground sides of your analog sensors, with a dedicated track direct to the AGnd pin and its associated decoupling capacitor. Otherwise, the inductance of a shared ground trace can cause significant fluctuations in analog readings, for example when switching output devices.
My only input is to pass on my experience with my standalone arduino projects. I have never made a PCB. My normal method is to use simple pad-per-hole protoboards. I then use 30 gage wire wrap wire soldered point to point on the 'wiring side' of the board. I do use larger gage wire for routing ground and +5vdc around the board as needed. I do liberally use .1 bypass caps soldered close to all active devices ground and Vcc pins. I have as yet have not seen any noise problems on few dozen of my projects many that also utilize the analog input pins. Not saying this to po po good engineering practices, just to suggest that the avr 328p chip running at 16Mhz doesn't seem to demand anything special as far as special layout requirements in my experience.
Does "trench" mean a break in the ground plane around a component or certain area, so that the ground plane under the area in question only connects to the larger plane at one point?
It might have been AVR042 I was reading recently. They get pretty carried away with reset buttons too, a capacitor to ground and a series resistor to the reset switch. Haven't seen that on any boards that I've noticed.
The same app note says,
5.6 PCB layout
Finally, the importance of the physical location of the resonator in relation to the AVR
should be stressed. Always place the resonator [/crystal] as close to the AVR as possible and
shield the resonator by surrounding it with a ground plane.
I've been doing double-side boards for less than a year, don't necessarily know what I'm doing, but have pulled off several ATmega328-based boards without issue. I do have some general guidelines as follows. Maybe I'm just fat, dumb, and happy, but so far things work fine. Have not done a lot of analog interfacing, however.
Ground planes on both sides.
Traces as short as possible.
100nF bypass on all power pins.
Don't make traces narrower than they have to be. Consider wider supply traces, consider making longer traces wider.
I attempt to use one side of the board for signal traces, with the idea of maximizing the ground plane on the other side. Of course this is never entirely possible, but I usually end up with most traces on one side.
retrolefty:
...Not saying this to po po good engineering practices, just to suggest that the avr 328p chip running at 16Mhz doesn't seem to demand anything special as far as special layout requirements in my experience.
Very good point. I do a lot of breadboarding, and not aware of any particular problems there, either. Not a reason to be sloppy, and I certainly don't go out of my way to be, but sometimes I use those very convenient pre-made breadboard jumper wires, which are never as short as they could be. It doesn't take long and there's a lot of wires up in the air.
Many thanks for your thoughtful replies. The trenches are gone, now the PCB is 95%+ ground plane on one side (with no non-GND conductor there longer than 0.1" or 2.5mm and a couple of islands thanks to through-hole components like the ISP header).
I didn't have issues with analog measurements in the past either, I simply was wondering if I was following best design practices or not. Given that Atmel is the maker of our chips, I ventured the guess that their advice is worth following... anyhow...
[quote author=Jack Christensen link=topic=86709.msg649950#msg649950 date=1326330603]
Does "trench" mean a break in the ground plane around a component or certain area, so that the ground plane under the area in question only connects to the larger plane at one point?[/quote]
Yes! The idea per the theory is that you cannot get induced loops if the signal can only exit at one point in the PCB. Likely more of a consideration with chips operating in the GHz range than our rather more pedestrian Atmels...
And to your other points, all signal lines are 15 mil, power lines are 24 mil thick and up. Thermal management can also be a consideration, i.e. where to put the heat emitting chips like voltage regulators vs. thermal sensors. I try keeping them on opposite ends of the board. Since I hand-assemble the boards, I use no chips smaller than a 0805 because getting those to seat on pads is interesting enough. I am also a big fan of the input protection system that Grumpy Mike posted on his site, i.e. a 22Ohm resistor in series with the signal plus a 100pF cap and a BAV99 protection diode referenced off AREF.
One resource that I have found incredibly useful is the freerouter to help me with chip placements. I may still route a board by hand, but the freerouter quickly illustrates what kinds of designs are likely going to require a lot vs. very few vias. The only downside to the freerouter is its tendency to 'forget' that polygons that are defined as GND do need a connection back to GND somehow... but I am certainly not complaining, it's an amazing resource, free, and it beats the autorouter in Eagle 5.11 to a pulp.
Everyone, thanks again, I really appreciate the help.
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