Reducing current draw on using CMOS logic gates

Grumpy_Mike:
What is the value of R for that circuit. It is unlikely that your problem is there. To check just disconnect it.

they are all 680 Ohm, even for the transistor emitter to GND.

Grumpy_Mike:
So not a resistor then?

no, i have no CL resistor for the LED from a/any logic gate IC output since the current is small enough.
(i do have CL res. for the LEDs on the transistor OR gates since those would have larger currents)

Grumpy_Mike:
I would draw a circuit like this:-

Then I would add the pin numbers and IC number on the symbols.

yes, that is infact the little diagram at the bottom - those are XOR gates (in place of the individual OR/NAND/AND gates).

i have some quad-XOR chips ready for the full-adder of the next two bits, i just decided to "explode" the XOR into it's individual OR,NAND,AND (to show how ICs make some standard circuits into a single chip)

Grumpy_Mike:
Your final carry out seems to be looped back into the beginning? There should be an LED on the carry out of the last stage.

that diagram you show is ONE full-adder, which is the same as the bottom half on mine, and that "loop-back" is actually the carry OUT from the bottom full-adder(ONE), to the carry IN of the top full-adder(TWO)

yes, i should test the bottom full-adder with an LED also before commencing the carry to the next full-adder.