Reducing current draw on using CMOS logic gates

just an additional thought, which kind of gets back to the original topic, if i could set the power supply to give a constant current of, say, just 5 mA - that would also protect the Output Devices, right ? (that way, any over-current would just fail the circuit and not ruin/burn the devices ? -cmiiw-)

how would one do that (make a PowSup of constant current) - i'd have to make a DC-DC converter circuit ?