That sort of current consumption happens when you connect the power backwards to a CMOS
logic chip, or set a CMOS chip into latch-up.
If you want minimum current consumption with CMOS you need to connect every single unused input
pin to either gnd or Vcc, otherwise you can get a few mA wasted per input due to shoot-through.
If you do that, and your circuit is low speed, expect a few microamps consumption at worst (for
the logic chips themselves, that is).
Don't forget to use decoupling capacitors - that is never optional with logic chips, and make sure the
supply voltage is within spec for the actual logic family you are using (for instance 74HC is 2V to 6V,
74HCT is 5V only, CD4000 series is 3 to 15V, etc).