There have been a few questions here lately asking about the capacitor values to use on each side of linear regulators.
The obvious answer is to follow the recommendations given in the data sheet for that particular regulator but it led me to wonder what values will makes them oscillate. Not having any linear regulators to hand I had a look using LTspice. The schematic I used for the analysis is attached. The capacitors all have realistic values built in for ESR and inductance.
Of course, as drawn it behaves well with a nice smooth start-up curve with just 50 mV overshoot before settling and no sign of oscillation with the load resistor being varied from 5 k to 5 ohm. So I started to throw things at it.
I removed both decoupling capacitors and there was no change!
Added a 220 uF capacitor across the load and that resulted in the overshoot on start up increasing to 150 mV with a few cycles of ringing. However that is a low frequency effect and wasn’t affected by the decoupling capacitors.
So, what does make it unstable? The answer seems to be the addition of a small amount of stray capacitance (I tried 2 pF) between the input and output of the regulator. That gives rise to RF oscillations at 7 MHz with a capacitive load as above which is just suppressed by the decoupling capacitors.
So, in addition to having the right value decoupling capacitors it is perhaps worth trying to minimise the stray capacitance across the regulator in the layout.