Reset electronics Mega

Hi,

I am developing my own PCB and having some trouble to understand the reset schematics of a mega IC.

This is the overall schematic I am looking at to get to know how it works: Schematic

If you combine all the stuff that is connected to the RESET label it comes to this (I use a different diode to limit different nr of components):

Where MEGA_RESET comes from the DTR line of the USB to serial IC.

What I have trouble to understand is how the different capacitors and the pull-up and pull down work together.

-The switch I understand, pulling reset to ground resets the mega
-10K is to keep RESET high
-The diode is protection for the peaks that could occur opening and closing the switch?
-The 0.1 uF is to pulse low when DTR goes low?
-The 22pF is decoupling?
-1K is to keep DTR low when floating?

What happens when DTR is high... continues current through 1K, waste of power... Or will dtr float or be low?

If DTR goes low, 0,1uF empties to give the low pulse but is the 0.1uF not already empty via the 1K?

Could somebody give me a hint how this works?

THX!

What happens when DTR is high... continues current through 1K, waste of power... Or will dtr float or be low?

Answer this- when does dc current pass through a capacitor? How can there be any waste of power?

Where MEGA_RESET comes from the DTR line of the USB to serial IC.

To understand this circuit completely, you need to characterize the state of the DTR line from the mystery IC, when not providing the LOW reset pulse.

I don't see a need or a function for the 22 pF capacitor.