If I read that datasheet right ...
Unlike modern families of CMOS logic that we all know and love, TTL output drive is not symmetrical.
Because of the output transistors' configuration, TTL gates can sink more current than they can source (lots more). See Footnote.
Look at the output specifications:
A single 74F04 gate is rated to sink 20 mA (with output equal to logic '0') but it is rated to source only 1 mA (with output equal to logic '1').
Putting TTL logic gate outputs in parallel in an attempt to get more drive capability is definitely not recommended. I mean, not only is it not recommended, it is particularly and specifically dis-recommended. Really.
Regards,
Dave
Footnote:
Input characteristics are also not symmetrical. They are consistent with output drivers so that a single F-family TTL output can drive 30 or more F-family inputs high or low.