Seeking Advice on Coverlay Lamination Overflow Issue in FPC Process

Community General Discussion
1

We’ve long been facing an issue during coverlay lamination in our flexible PCB (FPC) process — adhesive overflow at the panel edges. After lamination and baking, the excess glue tends to peel off, creating particles. These then get embedded during adhesive (PSA) application, resulting in surface contamination.

We’ve tried several countermeasures, including:

  1. Adding buffer material around the panel — helps reduce the overflow but cannot eliminate it completely.
  2. Reducing base/coverlay size to leave copper exposed at the edges — causes sharp edges that can cut hands due to thin copper thickness.
  3. Increasing base/coverlay size and trimming after lamination — limited by material layout; trimming generates dust that ends up on product surfaces and gets embedded during PSA lamination.

Unfortunately, none of these approaches fully solve the issue. We are still struggling to achieve our target of "no adhesive stringing or contamination at panel edges."

Has anyone encountered and resolved similar problems in their FPC process? Any insights or suggestions would be greatly appreciated. Thank you!

2

I have deleted your other cross-post @chrispon1982.

Cross-posting is against the Arduino forum rules. The reason is that duplicate posts can waste the time of the people trying to help. Someone might spend a lot of time investigating and writing a detailed answer on one topic, without knowing that someone else already did the same in the other topic.

Repeated cross-posting can result in a suspension from the forum.

In the future, please only create one topic for each distinct subject matter. This is basic forum etiquette, as explained in the "How to get the best out of this forum" guide. It contains a lot of other useful information. Please read it.

Thanks in advance for your cooperation.