I’m looking to add a power control switch to a Teensy 3.1 card.
Here’s my thinking - Vbat and VUSB feed thru low Vf diodes to the FET source; either LiPo battery, or USB if connected.
That provide at least 3.4V to the P-channel FET
The gate is pulled high to keep the P-FET off.
When the gate is pulled low by the switch, the processor wakes up and it then holds the gate low to stay awake via the N-channel FET. The N-channel keeps the pullup voltage off the processor pin when there’s no power on Vreg-in. It’s gate is pulled low to keep from floating and turning on unintentionally.
This makes sense, yes?
I should probably have cap C2 below the P-channel instead of above it, next to pin 8.