serial communication I2C protocal propgram

Projects Networking, Protocols, and Devices
1

is the given program is correct for one slave device(69) ...writing ....in two address named 08 and 09 ... amd two datas 06 and 25...

#include <Wire.h>

void setup()
{
Wire.begin(); // join i2c bus (address optional for master)
}

void loop()
{
Wire.beginTransmission(D2); // transmit to device #address 69h(110 1001) write(LSB 0) = (11010010)
Wire.write(08); // register address
Wire.write(06); // data
Wire.endTransmission(); // stop transmitting
delay();

Wire.beginTransmission(D2); // transmit to device #address 69h(110 1001) write(LSB 0) = (11010010)
Wire.write(09); // register address
Wire.write(25); // data
Wire.endTransmission(); // stop transmitting
delay();

}

2

Pavan_arduino:
is the given program is correct for one slave device(69) ...writing ....in two address named 08 and 09 ... amd two datas 06 and 25...

It is enough to execute the following codes:

#include <Wire.h>

void setup()
{
  Wire.begin(); // join i2c bus (address optional for master)

  Wire.beginTransmission(0x69); //not D2=1101 0010 ; 1101001 (0x69, slave address); 0 (write mode) 
  Wire.write(0x08);        // register address
  Wire.write(0x06);        // data for register with internal address 0x08
  Wire.write(0x25)         //data for register with internal address 0x09 (the next higher one)
  Wire.endTransmission();    // transmit the above queued data and bring STOP condition on I2C Bus
}

void loop()
{
  
}

BTW:
1. The slave address is always 7-bit. When the Master want to transmit (write) data to the salve, the master send this byte : 7-bit slave address + write bit (0) to the slave. Th following diagram (Fig-1) depicts the formation mechanism of the Control Byte (slave address + read or write bit = 8-bit).
cbtwiX.png
Figure-1: Control byte formed using slave address + read or write bit

cbtwiX.png

3

It is enough to execute the following codes:

How do you know without knowing what type of device OP addresses? Not every device allows to write multiple bytes to consecutive register addresses although this is a common feature.