In what state will the outputs of the register when power is applied to register normally connected in circut ("OUTPUT ENABLE" allows control outputs, loads are connected to outputs, presumably there will be zeroes in the latches) - will all loads be on or off?
MIC5891 low side, non-inverting output on the block diagram, inverting on the transistors
MIC5841 high side, inverting output on the block diagram, not inverting on the transistors
There is no information in datasheets about initial state, so what will be in real life?
That is a good question. If you look at the circuits you posted they are an equivalent schematic of each stage of the device. The device on the left 1-2 is a high side driver, the one on the right is a low side driver. They are driven with an internal serial in parallel out shift register designed for SPI communications. To answer your question it is a Piece of cake, just tell me what color blouse my Manager's wife had on last October and you will then have your answer. There are no clocks or reset pins so I would expect it to be in a random state.
Indeed it will be random. In fact, that is the principal purpose of the output enable, to allow you to disable it until you have shifted and latched all zeroes or your otherwise desired data into the registers.
Note also that it has a voltage drop of between 1.5 (low side) and 2 (high side) volts in the drivers which also limits the overall current driving ability. A TPIC6A595 will generally be a superior low-side driver.
Wow, thanks for info, it really has 1.5-2.5Vdrop at 100-200mA, it is extremelly high. And there are no graphs in datasheet for these registers. Can it be around 0.6V at 10mA?
Im looking I/O expander with driver in DIP package, so TPIC6A595 in SOIC is not for me, even with adapter.
Another way is PCF8574+Inverter+ULN2803, all in DIP, of course
Or Shift Register + ULN2803.
But general question for shift registers - are they in most cases have random state in power on? It is very bad for design, i need use extra pin/wire and external resistor/transistor to control OFF state during power on.
Do not confuse one MIC58xx and IOexpander(or shift register without driver)+ULN.
ULN has 0.7V@12mA, not great not terrible.
PaulRB:
So... get them in DIP!
So... my mistake again. TI produce them in DIP. Also I found around 60 DIP shift reigisters on Digikey, will check them. Before I searched in "Load Drivers" group, because they all have built-in driver circuit, and I supposed shift registers don't.
And TPIC6A595 needs extra diode for each relay.
nyash:
And TPIC6A595 needs extra diode for each relay.
No it doesn't.
The circuit of the MIC5841 is the same as the circuit of the ULN280x. They will have much the same characteristics. For only a few milliamps, the final transistor will saturate and the driver transistor will not conduct collector current.
Yes, I have been "banging on about it" for quite some time. You will find a number of such posts by searching here on the term "magical thinking" which describes the notions of "current surges" and inductors "generating" impulses (because of course, we know that inductors are used in generators) which infect the thinking of otherwise competent engineers.
As I detailed in that post, the mechanism employed in the TPIC6x595 devices is in fact, the absolute optimum approach to suppression of "kickback", using a "Miller capture" in the FET driver itself to limit the voltage to a perfectly safe point while optimising the release time of the solenoids or relays and maximally suppressing the transients which interfere with adjacent circuits.
You will find a number of such posts by searching here on the term "magical thinking" which describes the notions of "current surges" and inductors "generating" impulses (because of course, we know that inductors are used in generators) which infect the thinking of otherwise competent engineers. 
